Marvell Technology

Human Resources

• Plan and conduct on-site one-on-one listening sessions with employees across levels, functions, and geographies.
• Build trust quickly and facilitate conversations in a neutral, non-leading manner; ask effective follow-up questions to clarify themes and root causes.
• Maintain strict confidentiality and protect anonymity in all notes, summaries, and communications.
• Identify themes, trends, and potential hotspots across multiple sessions; distinguish isolated feedback from consistent patterns.
• Draft confidential, executive reports that summarize key themes and include de-identified verbatim comments.
• Escalate significant legal, compliance, ethics, or safety matters via established channels, while balancing confidentiality requirements.
• Partner with relevant stakeholders (e.g., BU executives, HR, Legal, Compliance, EHS, Security) as needed to ensure appropriate follow-up.
• Manage session logistics end-to-end (scheduling, travel coordination inputs, intake tracking, and follow-up requests).
• Continuously improve the listening-session approach and reporting templates based on feedback and outcomes.

Senior Staff, Employee Relations – Workplace Investigations

Product Manager

• deliver customized solutions for the next generation of AI systems
• quickly grasp our technical product and market domains
• command ownership of inbound and outbound product management and product marketing, including product roadmap for hyperscalers and other data center companies
• be a driving force who will help build and grow our business
• Shepherd business dialogue with hyperscalers from exploration through design win to deployment
• Leverage deep understanding of AI processing elements to guide strategy
• Analyze how hyperscalers customize architectures, including use cases, competition, and market dynamics
• Drive roadmap of custom IC capabilities aligned to customer needs
• Influence customer buying decisions through business and financial justification
• Build and manage relationships across multiple levels within customer organizations
• Support Marvell global sales teams in customer engagement
• Partner cross-functionally with architects, engineering, and operations teams to execute customer programs
• Guide product roadmaps for custom CPUs, XPUs, DPUs, and other workload acceleration devices for the next generation of AI systems
• Track market/technology trends, market sizing (TAM, SAM, SOM), competitive analysis, product positioning and pricing
• Develop an in-depth understanding of our competitor’s solutions
• Define compelling solutions with clear value propositions that are validated and endorsed by leading target customers
• Drive product and solution life cycle from first engagement to stable volume production
• Collaborate with engineering to develop reference design solutions for leading use cases and architecture engagements with leading customers and their platform partners

Product Management Lead – Hyperscale Custom Silicon

Technical Program Manager

• Lead custom and semi-custom solutions for our customers.
• Own the complete program lifecycle: initiation, planning, execution, and closure.
• Drive execution across development, validation, qualification, sample delivery, and production release phases.
• Monitor and control program performance to maintain alignment with schedule, quality, and cost targets against the Plan of Record (POR).
• Collaborate across a matrixed organization, engaging engineering, operations, and business teams to ensure program success.
• Serve as the primary point of contact for internal and external communications at engineering, management, and executive levels.
• Proactively identify risks and lead mitigation planning.
• Escalate and resolve issues effectively to maintain program momentum.
• Lead post mortems to identify areas for improvement, and pre mortems to apply learnings from other programs.

Engineering Program Manager

Infrastructure Engineer

• Own day-to-day EDA license server operations, ensuring high availability, performance, and reliability across global engineering teams
• Administer, troubleshoot, and resolve complex license issues involving FlexNet/FLEXlm and vendor-specific license managers
• Monitor real-time license usage, queues, denials, and expirations; proactively address bottlenecks and outages
• Manage license configurations, feature mappings, and allocation policies aligned with project priorities
• Partner with engineering teams to support critical tapeouts, regressions, and peak-demand phases
• Coordinate with EDA vendors on license renewals, upgrades, compliance questions, and escalations
• Support audits, true-ups, and compliance reporting, ensuring accurate usage data and traceability
• Drive cost optimization through usage analysis, pooling strategies, and rationalization of license portfolios
• Build and maintain automation scripts and services for license monitoring, alerting, reporting, and remediation
• Develop internal tools or dashboards for self-service visibility into license status, usage trends, and forecasts
• Standardize operational workflows, documentation, and runbooks to reduce tribal knowledge and manual effort
• Apply AI-assisted analytics to forecast license demand during peak project milestones, identify abnormal usage patterns or inefficiencies, and enhance reporting, summarization, and self-service support.

Staff EDA Licensing – Infrastructure Engineer

Software Engineer

• Build and deliver a multi-year roadmap with Engineering, IT, Security, and Facilities
• Stand up a “Labs as a Service” model with centralized provisioning, standardized services, and dedicated IT support
• Improve utilization through asset rationalization, BU consolidation, and process/tool upgrades
• Enforce role-based access, patching/automation, secure remote access, and regulatory compliance
• Unify operating models, SOPs, and governance across business units, incorporating automation and AI where impactful
• Architect NAC, Wi-Fi, and network segmentation to protect IP and engineering data
• Oversee co-location strategies, cloud transitions, and domain decoupling for lab environments
• Own the strategy and roadmap for engineering applications (e.g., custom apps, Jira, Confluence, Git, Jenkins, CI/CD)
• Build an integrated development platform that connects engineering applications, toolchains, and lab environments into a seamless ecosystem
• Modernize the engineering toolchain and integrate AI where it drives measurable productivity
• Champion DevSecOps to embed security early and automate compliance enforcement
• Ensure application resiliency, observability, and readiness for incident response across data centers and cloud
• Drive global standardization to improve scalability, reliability, and productivity across engineering sites

Senior Director, Engineering Applications – Labs

Program Manager

• Understand the SoC IP needs and develop plans to deliver and support the IP from conception through to program Mass Production Release (MPR)
• Have both depth and breadth in the related IP engineering that involve cross-functional organizations, in the forms of analog, logic, design for test, layout, timing, validation, PnR, etc.
• Drive closure of IP specs & requirements
• Demonstrated strong cross-functional leadership to chair weekly cross-functional meetings assessing status, milestones, and completeness of plans with regular program updates to Marvell Executive stakeholders
• Support Marvell's Program Management Process
• Matrixed leadership of engineering program managers distributed across the engineering organization
• Execute lessons learned, risk management, and enforce agreed-upon processes
• Responsibility for the successful outcome of IP development & delivery

Engineering IP Program Manager, Sr. Principal

Compliance

• responsible for export and import compliance activities at all locations where Marvell conducts business
• provide trade compliance support to U.S. and international operations
• ensure business transactions are processed in compliance with applicable trade control requirements
• support Marvell’s Global Export and Import Compliance Program
• work closely with engineering, operations, shipping and logistics, and G&A functions across Marvell’s global locations
• partner with stakeholders across the business to help navigate complex trade regulatory requirements
• help ensure compliance with the Export Administration Regulations, OFAC sanctions, ITAR, U.S. customs requirements, and other applicable trade control regimes
• establish and maintain compliance protocols, training, audit and self-assessment programs, and related documentation

Trade Compliance Manager

• Lead design engineering program management of subsystems to be incorporated into custom solutions for hyper-scale cloud data center customers
• Own end‑to‑end program delivery, including initiation, strategic planning, tracking, and execution of complex optical programs
• Collaborate with cross-functional teams to define product requirements, plan overall validation strategies, and ensure customer support
• Drive functional teams in debug and issue resolution
• Monitor and control project execution to maintain a healthy balance of schedule, quality, and cost against the plan of record
• Communicate effectively with engineering, management, and executive stakeholders
• Proactively identify risks, develop mitigation strategies, and escalate issues as needed to drive resolution
• Interface with corporate program management office

Senior Principal Program Manager

Full-stack Engineer

• Engage with customers, engineering, and marketing to lead chip architecture of innovative and complex processor-based SoCs.
• Specifying product requirements and driving to closure.
• Architecting new blocks and capabilities.
• Overseeing and coordinating IP evaluation, IP block microarchitecture, pinouts, cost estimates, and power estimates.
• Communicating and coordinating with other business units in Marvell on internal IP and sharing capabilities and knowledge.
• Presenting trainings to peers, helping develop the team, and mentoring other architects/engineers.

Senior Principal Engineer, Architecture ASIC/System

• Provide coaching and guidance to managers on performance management, employee conduct, conflict resolution, and workplace policies
• Conduct and oversee thorough, impartial investigations into complaints, including discrimination, harassment, retaliation, and policy violations
• Analyze ER data, trends, and metrics to identify systemic issues and recommend solutions
• Collaborate cross-functionally with HR Business Partners, Talent, Legal, and Compliance teams

Employee Relations Specialist

Mechanical Engineer

• Contribute to chip architectures and lead micro-architecture and RTL development and HW/SW co-design efforts
• Investigate, scope and plan new AI/HPC SOC programs
• Define ASIC and/or block architecture, micro-architecture and register specification.
• Conduct detailed architectural and/or design requirement reviews with customers, cross-functional teams, IP Vendors
• Lead and execute the implementation of a specification based on RTL coding techniques and best practices
• Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
• Work with the Verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation, performance analysis and debug
• Help develop and/or evaluate design and verification methodologies and participate in improving existing ones
• Provide mentorship to the more junior team members

Senior Principal IC Design Engineer, AI/HPC

• Perform advanced thermo‑mechanical finite element simulations to evaluate stress, strain, deformation, and structural integrity of test sockets, thermal heads, interconnects, fixtures, handlers, and package interfaces
• Lead warpage and deformation analysis for multi‑material assemblies, accounting for CTE mismatch, nonlinear material behavior, temperature gradients, and boundary conditions
• Develop thermal cycling and mechanical fatigue models to predict long‑term reliability, including creep, stress relaxation, and interface degradation
• Create process‑aware mechanical models capturing effects of assembly, cure, reflow, compression, press‑fit, and load‑path evolution through manufacturing and test
• Translate package and test infrastructure requirements into mechanical design constraints and reliability metrics for early architecture decisions
• Correlate simulation results with mechanical testing, thermal cycling data, warpage metrology, and strain measurements to validate and refine models
• Identify mechanical risk drivers and recommend design, material, or process changes to improve robustness, manufacturability, and yield
• Support root‑cause analysis of lab or field issues related to cracking, delamination, contact degradation, excessive warpage, or mechanical instability
• Develop simulation methodologies, modeling guidelines, and best practices to improve consistency and prediction accuracy across programs
• Partner closely with thermal, packaging, test, reliability, and manufacturing teams to ensure mechanical compatibility and system‑level alignment
• Interface with external vendors and manufacturing partners on material selection, tolerances, and mechanical performance expectations
• Document and communicate results through clear technical reports, design reviews, and executive‑level summaries

Senior Staff Thermo-Mechanical Engineer

• Own mechanical design and CAD development of test sockets, thermal heads, pedestals, handler design and loading mechanisms for high‑power semiconductor validation platforms
• Participate in tolerance stack‑up analysis, managing TIM bond‑line thickness (BLT) and contact stack compliance to prevent die cracking, excessive contact resistance, and reliability degradation
• Develop compliant mechanical designs, including springs, flexures, and preload structures, to absorb socket manufacturing tolerances and handler misalignment
• Design socket‑to‑thermal‑head integration features, ensuring precise alignment, mechanical stability, and repeatable contact under dynamic loading
• Architect and detail loading and clamping mechanisms that deliver uniform pressure profiles while meeting handler, automation, and cycle‑time requirements
• Design manufacturable internal fluid geometries, including micro‑channels and jet‑impingement manifolds, in collaboration with thermal engineering teams
• Reduce DPPM through mechanical precision, owning pedestal planarity, flatness, and uniform pressure mapping across the device interface
• Perform manufacturing‑focused tolerance and variation analysis, identifying sensitivity drivers and defining robust design margins
• Integrate multi‑zone heaters, sensors, and wiring paths within compact assemblies while maintaining serviceability and mechanical integrity
• Select CTE‑matched materials for sockets, pedestals, and structural components to minimize package and fixture warpage across temperature excursions
• Develop modular, scalable CAD architectures and reusable design kits to enable rapid customization and high‑volume manufacturing deployment
• Drive Design for Manufacturability (DFM) optimization, ensuring complex evaporator and fluid‑integrated geometries are cleanable, inspectable, and mass‑producible
• Partner with manufacturing, reliability, and supply‑chain teams to define build processes, inspection methods, and production readiness criteria
• Interface with external vendors on machining, surface finishing, coatings, and precision component fabrication.

Staff Mechanical Design Engineer

• Develop and validate timing constraints for intricate SoC designs
• Collaborate with Architecture, RTL, DFT, and Analog teams to understand the design requirements, analyze the timing complexities, and develop consolidated timing modes and constraints for STA signoff
• Own and contribute to various STA related tasks like doing timing ECOs for blocks and SoCs, developing custom scripts to create histograms, STA flow management, etc.
• Perform static timing analysis (STA) using industry-standard tools (e.g. Primetime)
• Define and implement timing signoff methodologies, including process corners, derates, and uncertainties
• Resolve or find workarounds for tool issues, independently or working with EDA tool vendors
• Conduct post-route timing checks and quality of results (QoR) analysis
• Automate STA related processes/flow using scripting languages such as Tcl or Python
• Create QoR dashboards, histograms for STA runs across all modes
• Ensure compliance with timing signoff checklists and criteria
• Document best practices and lessons learned to drive continuous improvements in future projects.

Senior Staff Engineer, ASIC Design, Implementation, LEC, STA, Power Analysis

Backend Engineer

• Design and build scalable database systems to support high-volume, time-series telemetry data
• Develop and maintain ETL (extract, transform, load) pipelines to ingest, normalize, and aggregate telemetry data from multiple sources
• Optimize database schemas, queries, indexing, and retention strategies for performance and reliability
• Build Python-based services and APIs for data processing, analytics, and customer integrations
• Support real-time and historical analytics, including data validation and quality checks
• Collaborate with cross-functional teams (firmware, hardware, DevOps, and UI) to define data requirements and integrations
• Provide technical leadership, design guidance, and mentorship to other engineers