Intel Corporation

Systems Engineer

• Serve as a subject matter expert (SME) for the Workday Benefits module and related integrations.
• Partner with HR Technology to develop, enhance, and test system functionality and workflows.
• Collaborate with vendor partners on the configuration and testing of Workday Benefits plans, time off/leave plans, eligibility rules, rates, events, and integrations in alignment with Altera policies and vendor requirements.
• Identify system enhancements and partner with HRIS to deploy changes and optimize processes.
• Streamline benefits workflows and support continuous improvement initiatives across Total Rewards and HR Operations.
• Maintain detailed documentation of system configuration, processes, and standard operating procedures.
• Partner with benefits vendors to support EDI file maintenance, integration testing, and troubleshooting.
• Provide Workday benefits expertise to ensure optimization of system outcomes.
• Maintain comprehensive documentation for system configurations and operational​

Benefits Business Systems Analyst – Contract

Engineer

• Design, develop, and maintain features and optimizations primarily focused on Intel SHMEM (Shared Memory Access)
• Optimize software for exceptional performance: low latency, high bandwidth, and maximum reliability
• Collaborate directly with scientists and engineers on the Aurora supercomputer at Argonne National Labs
• Make meaningful contributions that advance scientific computing and machine learning capabilities
• Partner with cross-functional teams to define software requirements and technical specifications
• Drive performance optimizations that push the boundaries of what's possible in high-performance computing

Senior Middleware Development Engineer

Solutions Engineer

• Working with the SoC architecture teams to understand the SoC chassis requirements
• Designing and developing high-performance networks-on-chip which meet the SoC PPA requirements
• Coordinating with the foundation IP development team within the Chassis Group to modify/create IP components as per SoC needs

Platform Integration Engineer

Analyst

• play a pivotal role in optimizing Intel's supply chain operations
• develop and execute strategic planning schedules and forecasts
• ensure timely delivery of materials and products
• maintain inventory alignment with customer demands
• collaborate across teams, including Marketing, Engineering, Finance, and Factory Operations
• analyze supply vs. demand statements and ensure alignment with customer commitments
• provide quantitative and qualitative inputs to optimize supply and demand balance within constraints
• drive continuous process and tool improvement initiatives

Supply Planning Analyst

• We're looking for talented, self-motivated engineers to join our Design Verification (DV) team in a junior or mid-level position.
• We work on some of the most technically challenging silicon in the industry, spanning digital and analog design, DSP pipelines, and firmware-hardware co-verification.
• Constrained-random and coverage-driven verification of complex high-speed SerDes mixed-signal IP, including advanced verification environment development
• Validation of DSP datapaths FW/HW joint verification
• Leveraging AI-assisted tools as a core part of your daily engineering workflow

Junior Verification Engineer

• Own and execute constrained-random and coverage-driven verification of high-speed SerDes mixed-signal IP
• Develop and maintain advanced SystemVerilog/UVM verification environments
• Validate DSP datapaths against reference models
• Contribute to FW/HW joint verification flows
• Leverage AI-assisted tools as a core part of your daily engineering workflow

Senior Verification Engineer

Designer

• Responsible for SoC architecture verification tasks including creating test cases and test bench using UVM methodology
• Coordinate cross functional efforts with Design, SW, Architecture team for full coverage verification plan
• Using system full application to verify performance
• Pre-silicon system verification of SoC, FPGA & Full Chip design

Senior SoC Design Verification Engineer

• Lead pre-silicon verification strategy and execution for SoC verification
• Performs functional logic verification at multiple levels ( block, subsystem and full chip )
• Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications
• Documents, reviews, and executes the verification strategy plan on different methodologies/techniques (e.g., gate-level-simulation strategy, power patterns/aware simulations) used to enable feature coverage as per the microarchitecture specifications
• Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs
• Replicates, root causes, and debugs post-si issues in the pre-silicon environment
• Absorbs learning from post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products
• Complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure)

SoC Design Verification Lead

Chief of Staff

• Drive business decision-making processes and ensure successful execution of strategic objectives
• Serve as a key liaison between CEG and partner organizations across Intel
• Lead organizational sensing activities to identify priorities, gaps, and opportunities
• Collaborate with other Chiefs of Staff and senior executives globally
• Manage executive scheduling, staff meetings, and day-to-day operational execution
• Create high-quality collateral materials for internal and external stakeholders
• Drive special projects and cross-functional initiatives within CEG
• Establish and optimize business processes to enhance organizational effectiveness
• Coordinate with support functions (HR, Finance, Legal) on planning and reviews
• Build and maintain strong relationships across CEG and partner organizations
• Facilitate communication and alignment between engineering teams and business units
• Represent CEG leadership in cross-functional forums and strategic discussions
• Drive stakeholder relationship management initiatives

TA, Chief of Staff

• Own the formal verification of microarchitecture blocks, methodologies, and critical aspects of CPU designs
• Develop comprehensive formal verification strategies, plans, and proofs aligned with microarchitecture specifications
• Create abstraction models to simplify design complexity and ensure convergence on validation
• Collaborate with architects, RTL developers, and physical design teams to enhance verification efficiency
• Analyze, debug, and resolve issues identified during verification, documenting findings and corrective actions
• Develop and document formal verification test plans and conduct technical reviews with design and architecture teams
• Maintain and innovate formal verification infrastructure and methodologies to streamline development
• Mentor junior engineers and contribute to the growth of technical expertise within the team
• Support post-silicon failure debug and resolution efforts when required

CPU Formal Verification Engineer

• Conducts verification of IP and/or SoC microarchitecture using formal verification tools
• Creates comprehensive formal verification test and coverage plans
• Develops formal proofs and reviews proofs, creates methods for verification
• Collaborates with architects, RTL developers, and physical design teams
• Maintains and improves existing functional verification infrastructure and methodology

• Lead thin film process excellence across CVD, ALD, PVD, epitaxy, thermal/plasma deposition, furnace, implant, anneal, and/or treatment technologies
• Drive defectivity reduction and uniformity improvements through systematic process enhancement
• Align technical vision with customer requirements and business objectives
• Collaborate closely with Technology Development, High Volume Manufacturing, and Business Groups

Senior Thin Films Engineer

• Drive module ownership and technical leadership across Intel's most advanced logic technologies
• Lead CMP process development from concept through HVM implementation
• Drive standardization and best practices across Intel's technology portfolio
• Own and resolve complex CMP-related yield and manufacturing issues
• Align technical strategies with customer requirements and business objectives
• Collaborate with Integration, Device, Yield, Factory, Quality, and Customer Engineering teams
• Mentor junior engineers and provide technical guidance

Senior Member of Technical Staff, Engineer

• Design, develop, and deliver a comprehensive verification strategy and methodology
• Implement advanced verification environments, tools, and testplans
• Collaborate closely with architecture, design, and software teams
• Drive ownership of multiple critical blocks and verification components
• Champion innovation across simulation, formal, and accelerated verification methodologies
• Mentor and develop verification engineers; establish verification best practices.

Senior Design Verification Engineer

Full-stack Engineer

• Architects, designs and provides technical oversight of the development of Intel GPU AI software.
• Scope spans the entire stack including firmware, drivers, frameworks, protocols, algorithms, and/or applications.
• Interacts with technologists across Intel and within the industry to evaluate feasibility of requirements and determine priorities for development.
• Responsible for ensuring that the software stack is built to meet the requirements outlined for the product in terms of supported workloads, capabilities needed, performance, stability, and ease of use.
• Responsible for key technical design decisions, and will ensure that they are well thought out, documented, and communicated across teams.
• Develops and mentors other technical leaders, grows the community, acts as a change agent, and role models Intel values.

Benefits Business Systems Analyst – Contract

Senior Middleware Development Engineer

Platform Integration Engineer

Supply Planning Analyst

Junior Verification Engineer

Senior Verification Engineer

Senior SoC Design Verification Engineer

SoC Design Verification Lead

TA, Chief of Staff

CPU Formal Verification Engineer

CPU Formal Verification Engineer

Senior Thin Films Engineer

Senior Member of Technical Staff, Engineer

Senior Design Verification Engineer

End to End GPU AI Software Architect