SoC Logic Design Engineer

Intel Corporation

Logic Design Engineer developing register transfer level (RTL) coding and simulation for SoC designs at Intel. Collaborating on architecture definition and quality assurance for robust designs.

Posted 5/9/2026full-timeSanta Clara • California, Colorado, Oregon • 🇺🇸 United StatesMid-LevelSenior💰 $141,910 - $269,100 per yearWebsite

About the role

Key responsibilities & impact

Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design
Participates in the definition of architecture and microarchitecture features of the block being designed
Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence
Applies various strategies, tools, and methods to write RTL and optimize logic to meet power, performance, area, and timing goals
Works with IP providers to integrate and validate IPs at the SoC level

Requirements

What you’ll need

Bachelor's degree in Electrical/Computer Engineering or related STEM field with 6 years or more relevant experience
Master's degree in Electrical/Computer Engineering or related STEM field with 5 years or more relevant experience
SOC or Subsystem RTL design and integration using Verilog/SystemVerilog
IP RTL design using Verilog/SystemVerilog
Experience with SoC flows for Reset, Power Management, Interrupts and Error Handling

Benefits

Comp & perks

Competitive pay
Stock bonuses
Health insurance
Retirement plans
Vacation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

RTL codingSoC designVerilogSystemVeriloglogic designtiming convergencepower convergenceIP integrationquality checksoptimization strategies