Intel Corporation

Solutions Engineer

• Own the end-to-end customer relationship as the primary interface between the customer and Intel, ensuring seamless communication, trust, and alignment across all phases of engagement.
• Work directly with customer to understand packaging challenges and requirements and provide technical consultation on packaging solutions and processes.
• Engage expert stakeholders across Intel Foundry to ensure customers have firsthand access to information.
• Collaborate with cross-functional teams including Technology Development, Product Engineering, Manufacturing and Operations, and Customer Engineering teams providing feedback to influence product and technology roadmaps.
• Lead and coordinate all internal Intel interactions related to the customer account to drive commitment to execution across schedule, quality, technical execution, qualification and volume ramp.
• Develop and maintain the Statement of Work (SOW) documenting customer requirements, Intel Foundry commitments, technical deliverables, and schedule milestones.
• Manage full customer engagement lifecycle from initial design award through development, ramp, high volume manufacturing (HVM), and end of life.
• Track and drive closure of customer commitment, action items and escalations.
• Monitor milestones, risks, dependencies and change requests.
• Drive resolution of issues affecting qualification and delivery.
• Provide clear status reports to both customers and leadership.
• Serve as the Voice of the Customer inside Intel Foundry, ensuring customer priorities, risks, and expectations are clearly communicated and advocated across all internal functions.

Account Technical Solutions Engineer, Foundry Services Advanced Packaging

Architect

• Drives end-to-end development for substrate design from concept through tapeout and implements physical layout and routing of the package design
• Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs
• Works closely with silicon and hardware teams to optimize silicon package board performance and pinout
• Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design
• Completes documentation and collateral into the product lifecycle management system of record

Packaging Design Architect

Engineer

• Support compact modeling activities for Intel's new technologies
• Collaborate with design teams to enable best-in-class products for data-centric applications
• Co-optimize Intel's state-of-the-art process technology
• Directly enable design teams to get to market faster with leadership products

Semiconductor Device Modeling Engineer

Artificial Intelligence

• Contribute to the design, development, and optimization of AI algorithms
• Assist in implementing and tuning models for performance and accuracy
• Hardware/software integration
• Contributing to the development of AI software solutions in partnership with internal product teams
• Accomplishing meaningful work that supports Intel business goals in a collaborative environment

AI Algorithm Engineer

• Shape the Future of Technology at Intel and Transform Tomorrow's Technology Today
• Join Intel as a Yield Development Engineer and play a pivotal role in advancing semiconductor process technology.
• Drive yield improvements across next-generation technology nodes.
• Working with cross-functional teams, tackle complex engineering challenges.
• Develop breakthrough methodologies that define the future of semiconductor manufacturing.
• Identify and resolve yield-limiting factors throughout technology node lifecycles.
• Develop innovative solutions for complex yield challenges.
• Design measurement protocols for rapid, accurate product integrity assessment.
• Conduct advanced statistical analysis and create data visualizations.
• Build comprehensive process development roadmaps aligned with yield milestones.
• Transform manufacturing and experimental data into actionable yield improvement strategies.
• Partner with design, test, and process development teams to debug yield issues.
• Lead new product introductions and design-technology co-optimization initiatives.
• Participate in factory task forces and design of experiments programs.
• Develop and optimize equipment and methodologies for advanced logic nodes.
• Ensure manufacturability through comprehensive process analysis.
• Support manufacturing ramp readiness through proactive yield issue resolution.

Senior Yield Development Engineer

Designer

• Perform functional verification of IP logic to ensure design meets specification requirements
• Develop IP verification plans, test benches and verification environment to ensure coverage
• Execute verification plans and define and run system simulation models to verify design, analyze power and timing, and uncover bugs
• Replicate, root cause and debug issues in pre-silicon environment
• Find and implement corrective measures to resolve failing tests
• Collaborate with architects, RTL developers and physical design teams to improve verification of complex architectural features
• Document test plans and drive technical reviews with teams
• Maintain and improve functional verification infrastructure and methodology

IP Design Verification Engineer

• Contribute to the development and validation of Intel’s next-generation CPU designs
• Perform functional verification of CPU logic
• Develop verification plans and test benches
• Execute verification plans and run system-level simulations

CPU Verification Engineer

Game Engineer

• Analyze Unreal Engine performance on Intel hardware using profiling tools
• Identify performance bottlenecks across subsystems
• Develop targeted optimizations, sample code, or engine patches
• Validate new engine features on Intel hardware
• Serve as a primary technical liaison to Epic’s engineering teams
• Collaborate with GPU architects and driver engineers
• Produce technical documentation and reference samples
• Assist game developers in debugging performance issues

Unreal Engine Developer

• Development and enablement of Accelerator IPs in Intel platforms
• Implement and debug complex hybrid models of SOCs, chiplet dies
• Create FPGA and Hybrid FPGA emulation models from RTL
• Define and develop new capabilities and HW/SW tools for validation
• Develop hardware collateral to be integrated with the FPGA emulation model
• Test and debug the FPGA emulation model
• Support continuous integration of model builds
• Support Software and Validation team with model use

Senior Emulation Engineer

Manager

• Own VMaaS and CaaS platforms end‑to‑end, including architecture, operations, lifecycle, security posture, and service quality
• Ensure 24x7 availability, incident response readiness, and operational stability
• Lead major platform initiatives including: VMware EOL and Hyper‑V migration, Kubernetes version upgrades and lifecycle alignment
• Drive the adoption of AI and automation tools to improve operational efficiency
• Lead and develop a highly skilled platform team spanning VM, Kubernetes, and automation expertise

Manager – VMaaS & CaaS Platforms, Enterprise, Labs

DevOps Engineer

• Supports and contributes to software development infrastructure and processes including automation, monitoring, and optimization.
• May assist in CI/CD setup, cloud integration, containerization, and deployment workflows to improve reliability and scalability.
• Works with software engineers, IT, and operations teams to streamline development and release processes.
• As an intern, learns and applies knowledge, builds skills, and explores future career opportunities through hands-on experience and projects that support Intel business goals in a collaborative environment.

EC Infra and DevOps Engineer – Undergraduate Intern

• Support compact modeling activities for Intel's new technologies
• Enable design teams to get to market faster with leadership products based on innovative technologies
• Collaborate with cross-functional teams to refine design and model efficiency