Support compact modeling activities for Intel's new technologies
Collaborate with design teams to enable best-in-class products for data-centric applications
Co-optimize Intel's state-of-the-art process technology
Directly enable design teams to get to market faster with leadership products

Requirements

Bachelor's degree in Electrical Engineering or a related discipline and 5+ years of experience or Master's degree with 3+ years of experience
Graduate coursework or research experience in semiconductor device physics or 5+ years of work experience in Semiconductor device physics
1+ years' experience Python scripting for data analysis, automation and documentation
Proficiency with extraction tools (e.g., ICCAP, MBP) and commercial simulators such as HSPICE, Spectre
Hands-on experience with BSIM-CMG and compact models for transistor modeling at advanced nodes (e.g., FinFET, GAA)
Experience developing Layout-dependent effects (LDE) for FinFET or GAAFET technologies
Strong understanding of process flow, layout, and basic circuit design/simulation
Proven capability to collaborate across multiple teams and geographies
Experience with machine learning algorithms

Benefits

competitive pay
stock bonuses
health insurance
retirement plans
vacation

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools

Python scriptingdata analysisautomationdocumentationBSIM-CMGcompact modelstransistor modelingLayout-dependent effectsmachine learning algorithmssemiconductor device physics

Soft Skills

collaborationleadership

Certifications

Bachelor's degree in Electrical EngineeringMaster's degree in related discipline