Cadence Design Systems

Full-stack Engineer

• Design and implement scalable infrastructure for AI agents operating within Cadence’s ChipStack SuperAgent ecosystem.
• Build robust evaluation frameworks to measure agent performance, reliability, and alignment with engineering workflows.
• Develop data pipelines, retrieval systems, and context-engineering strategies to support consistent and grounded agent behavior.
• Contribute to continuous integration, automated testing, and observability systems to ensure production-quality deployment of AI-enabled systems.
• Optimize system performance across latency, cost, reliability, and scalability dimensions.

Senior Principal Software Engineer

Mechanical Engineer

• Support the adoption of Cadence Products for Chip Designer Customers
• Articulate design methodologies involving Cadence tools
• Own block implementation, top-level implementation and Signoff focused efforts
• Involve in competitive benchmarking on complex blocks including CPUs, GPUs and DSP cores
• Assist customers with adopting Cadence Front End tools in Synthesis with Genus DFT & Scan with Encounter Test
• Drive best practices and lessons learnt from evaluations/benchmarks back into product development

Senior Principal Design Engineer

Engineer

• Join a dynamic and growing team of experienced engineers developing high-performance physical IP for industry-standard protocols
• Responsible for the verification of digital RTL and development of re-usable verification components and environments
• Contribute to all aspects of digital verification including flow development, test plan development and execution, functional coverage closure, and code coverage closure
• Communicate with all members of the technical staff regarding overall project development progress and status
• Work as part of a small and focused team of engineers and collaborate successfully as needed with design teams, verification teams, project management, and digital and analog design teams in multiple worldwide geographies

Lead Digital Verification Engineer

• Deliver Emulation and Prototyping assisted verification products using virtualization (SW) technologies
• Develop, Maintain, and deliver feature-based training for new products/features
• Deploying new and emerging protocol products to customers working on advanced SOC and System designs
• Use expertise in OS, kernel, and driver SW development to support Cadence VirtualBridge products
• Help customers utilize Cadence’s Accelerated Verification IPs and advanced APIs and verification Methodologies
• Drive the requirements and deployment of new protocol products and features
• Support customers in getting the most out of their Hardware platform investment

Principal Product Engineer – Virtual Protocols

Field Engineer

• Lead delivery of FEA‑based engineering consulting projects across multiple industries
• Develop end‑to‑end simulation workflows tailored to customer needs
• Perform advanced analyses including linear/nonlinear stress, thermal, modal, frequency response, and dynamic simulations
• Process and mesh complex customer CAD geometry
• Prepare technical reports and deliver results presentations to customers
• Support presales activities including discovery calls, technical reviews, and solution proposals
• Estimate project scope, cost, and schedule to support new business acquisition
• Collaborate closely with commercial account managers on account planning and execution
• Mentor and support other members of the Customer Service Engineering team
• Deliver custom workflow or application‑specific training as needed
• Travel to customer or test sites as required (up to 10%).

Principal Customer Service Engineer

Art Director

• Serve as the technical leader for Physical Design and Design for Test teams, driving complex customer SoC projects from RTL or Netlist to GDS.
• Work directly with customers throughout engagements, from initiation to final GDS delivery, taking ownership of technical decisions, design trade-offs, and innovative problem solving to achieve customer PPA and schedule requirements.
• Guide customers in selecting the appropriate foundry/node, library, and memory compiler, and establish sign-off criteria to ensure the best features versus cost trade-offs.
• Collaborate with internal Cadence teams to deliver technical presentations and promote internal AI initiatives to improve quality and efficiency.
• Work closely with customer or internal RTL/Synthesis teams to ensure that key metrics are achieved efficiently prior to the physical design execution phase gate.
• Partner with Cadence tools R&D to enhance tools and methodologies to meet and surpass customer requirements.
• Document and share best practices and lessons learned from ongoing and completed projects to improve efficiency, success rates, and AI adoption in future programs

Chip Lead – Physical Design Director

• Development of firmware and DSP architecture verification and enhancement for AI/Vision applications.
• Developing and testing customized instructions for accelerating AI, Image and Video processing algorithms using the C Intrinsics for underlying TIE based ISA.
• Developing, debugging and optimizing examples and software libraries for AI, Image and Video processing algorithms.
• Supporting the HW team to ensure that the customized instructions are optimized considering hardware gate count & power and verification of the customized instructions.
• Generating the engineering and customer documentation.

Principal Design Engineer

Human Resources

• Serve as the primary HR Business Partner to leaders and managers across the R&D organization
• Partner closely with leadership to support business objectives through effective people strategies
• Deliver end-to-end HR support across: Workforce planning and organizational design
• Compensation and performance management
• Talent development, retention, and succession planning
• Employee relations and manager coaching
• Coach managers on navigating a wide range of people-related challenges with consistency, sound judgment, and empathy
• Facilitate and implement Center of Excellence (COE) –driven programs and initiatives
• Identify , propose, and implement solutions related to talent acquisition, engagement, development, and retention
• Leverage an understanding of the business, organization, and goals to anticipate needs and proactively drive change
• Partner with HR COEs to bring specialist insights and scalable programs to the business
• Use data and insights to surface trends, inform decisions, and drive action
• Operate with a balance of strategic thinking and hands-on execution in a fast-moving environment.

HR Business Partner

• Deliver Molecular Dynamics based solutions for predicting protein-ligand binding affinities
• Extend capabilities in molecular dynamics and related tools
• Collaborate with scientific developers and academic partners
• Contribute to the development of software tools and methodologies

Scientific Software Developer – Affinity

Technical Recruiter

• Manage full-cycle recruiting for technical and technical sales roles, including sourcing, screening, interviewing, and offer negotiation
• Partner with hiring managers to understand role requirements, team needs, and hiring priorities
• Work closely with hiring managers to filter and screen candidates
• Build and maintain strong candidate pipelines for hard-to-fill and niche technical positions
• Ensure a positive candidate experience throughout the recruitment process

Contract Technical Recruiter

• Extend OpenEye’s programming toolkits by developing and implementing new and useful scientific and technical features to aid customers in developing bespoke solutions.
• Explore methods for further enhancing OpenEye’s virtual screening platform (including OMEGA, ROCS, FastROCS, OEDocking).
• Apply chemistry/cheminformatics expertise with ML experts to build robust, scalable models to support data-driven decision making.
• Work on retrospective and prospective projects both internally and with collaborators to validate methodologies.
• Work with Orion project team to further optimize compound design workflows in Orion.

Scientific Software Developer II – Modeler

Systems Engineer

• Supporting multiple geological locations to serve user communities across North America, Europe, and Asia sites.
• Focusing on improving customer productivity and committing to customer success.
• Driving the overall operational strategy for internal High-Performance Compute (HPC) clusters in Cadence cloud.
• Maintaining, enhancing, monitoring, reporting, and improving its efficiency.

Staff Systems Engineer – Cloud Operations, Support

• Work on cutting-edge technology in an environment that encourages creativity and innovation
• Collaborate with R&D and Customer Engagement teams to influence the development of software tools for advanced chip design platforms

Lead Product Engineer

• Partner with business units to understand organization’s needs.
• Design, plan, implement & support global data centers and WAN.
• Handle multiple high-impact projects concurrently.
• Undertake large scale network transformation initiatives working in a cross-functional team.
• Analyze and resolve complex network issues, serving as a high-level escalation point for the support teams.
• Improve operational efficiency – Enhance Network Automation, Empower NOC team through knowledge base, runbooks, review & reduce tickets strategically.
• Identify gaps, risks, potential issues and resolve them proactively.
• Audit and develop standards and procedures for network technologies.

IT Staff Systems Engineer

• Own and manage end-to-end customer engagements, acting as the primary GTM driver for our agentic AI and LLM-driven EDA products.
• Serve as the strategic bridge between customers, Field Application Engineers (FAEs), and R&D, ensuring that technical evaluations are executed flawlessly and feedback is operationalized.
• Blend deep technical knowledge of semiconductor design with strong business acumen to articulate product value propositions, ROI, and competitive differentiation to engineering leaders and executives.
• Engage directly with early adopters and key customers to understand their specific design workflows, translating their requirements into actionable roadmaps for the R&D team.
• Develop high-impact technical collateral, product presentations, and deployment playbooks to empower the sales and FAE teams in the field.
• Maintain current knowledge of advancements in AI-powered hardware design, EDA trends, and market dynamics to actively participate in shaping the product's strategic direction.