Intel Corporation

Engineer

• Support compact modeling activities for Intel's new technologies
• Collaborate with design teams to enable best-in-class products for data-centric applications
• Co-optimize Intel's state-of-the-art process technology
• Directly enable design teams to get to market faster with leadership products

Semiconductor Device Modeling Engineer

Artificial Intelligence

• Contribute to the design, development, and optimization of AI algorithms
• Assist in implementing and tuning models for performance and accuracy
• Hardware/software integration
• Contributing to the development of AI software solutions in partnership with internal product teams
• Accomplishing meaningful work that supports Intel business goals in a collaborative environment

AI Algorithm Engineer

Designer

• Perform functional verification of IP logic to ensure design meets specification requirements
• Develop IP verification plans, test benches and verification environment to ensure coverage
• Execute verification plans and define and run system simulation models to verify design, analyze power and timing, and uncover bugs
• Replicate, root cause and debug issues in pre-silicon environment
• Find and implement corrective measures to resolve failing tests
• Collaborate with architects, RTL developers and physical design teams to improve verification of complex architectural features
• Document test plans and drive technical reviews with teams
• Maintain and improve functional verification infrastructure and methodology

IP Design Verification Engineer

• Contribute to the development and validation of Intel’s next-generation CPU designs
• Perform functional verification of CPU logic
• Develop verification plans and test benches
• Execute verification plans and run system-level simulations

CPU Verification Engineer

Game Engineer

• Analyze Unreal Engine performance on Intel hardware using profiling tools
• Identify performance bottlenecks across subsystems
• Develop targeted optimizations, sample code, or engine patches
• Validate new engine features on Intel hardware
• Serve as a primary technical liaison to Epic’s engineering teams
• Collaborate with GPU architects and driver engineers
• Produce technical documentation and reference samples
• Assist game developers in debugging performance issues

Unreal Engine Developer

• Development and enablement of Accelerator IPs in Intel platforms
• Implement and debug complex hybrid models of SOCs, chiplet dies
• Create FPGA and Hybrid FPGA emulation models from RTL
• Define and develop new capabilities and HW/SW tools for validation
• Develop hardware collateral to be integrated with the FPGA emulation model
• Test and debug the FPGA emulation model
• Support continuous integration of model builds
• Support Software and Validation team with model use

Senior Emulation Engineer

Manager

• Own VMaaS and CaaS platforms end‑to‑end, including architecture, operations, lifecycle, security posture, and service quality
• Ensure 24x7 availability, incident response readiness, and operational stability
• Lead major platform initiatives including: VMware EOL and Hyper‑V migration, Kubernetes version upgrades and lifecycle alignment
• Drive the adoption of AI and automation tools to improve operational efficiency
• Lead and develop a highly skilled platform team spanning VM, Kubernetes, and automation expertise

Manager – VMaaS & CaaS Platforms, Enterprise, Labs

DevOps Engineer

• Supports and contributes to software development infrastructure and processes including automation, monitoring, and optimization.
• May assist in CI/CD setup, cloud integration, containerization, and deployment workflows to improve reliability and scalability.
• Works with software engineers, IT, and operations teams to streamline development and release processes.
• As an intern, learns and applies knowledge, builds skills, and explores future career opportunities through hands-on experience and projects that support Intel business goals in a collaborative environment.

EC Infra and DevOps Engineer – Undergraduate Intern

• Support compact modeling activities for Intel's new technologies
• Enable design teams to get to market faster with leadership products based on innovative technologies
• Collaborate with cross-functional teams to refine design and model efficiency

Mechanical Engineer

• Understand design dataflow and chip-level floor-planning constraints to set up partition floorplans with macro/pin placements and keep-outs.
• Work with RTL designers to define timing constraints; run synthesis and place-and-route trials; fix timing, EM/IR and DRC violations.
• Run back-annotated VCS+SDF simulations and iterate on meeting power/performance targets.
• Write custom scripts and define tool flows to manipulate synthesis and physical design tools for low power/high performance custom designs.

Semiconductor Device Modeling Engineer

AI Algorithm Engineer

IP Design Verification Engineer

CPU Verification Engineer

Unreal Engine Developer

Senior Emulation Engineer

Manager – VMaaS & CaaS Platforms, Enterprise, Labs

EC Infra and DevOps Engineer – Undergraduate Intern

Semiconductor Device Modeling Engineer

Physical Design Engineer – Neuromorphic Computing