Physical Design Engineer – Neuromorphic Computing

Intel Corporation

Physical Design Engineer at Intel's Neuromorphic Computing Lab ensuring designs meet performance targets. Collaborating with RTL designers and writing scripts for physical design tools.

Posted 4/13/2026full-timeHillsboro • California, Oregon • 🇺🇸 United StatesMid-LevelSenior💰 $122,440 - $232,190 per yearWebsite

Tech Stack

Tools & technologies

PerlPython

About the role

Key responsibilities & impact

Understand design dataflow and chip-level floor-planning constraints to set up partition floorplans with macro/pin placements and keep-outs.
Work with RTL designers to define timing constraints; run synthesis and place-and-route trials; fix timing, EM/IR and DRC violations.
Run back-annotated VCS+SDF simulations and iterate on meeting power/performance targets.
Write custom scripts and define tool flows to manipulate synthesis and physical design tools for low power/high performance custom designs.

Requirements

What you’ll need

Bachelors & 4+ years or Masters & 3+ years or PhD with hands-on physical design experience.
3+ year of experience in synthesis, place and route and timing/layout closure.
3+ years of experience with scripting languages such as Perl, TCL, Python, etc.

Benefits

Comp & perks

competitive pay
stock bonuses
health
retirement
vacation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills & Tools

physical designsynthesisplace and routetiming closurelayout closureVCSSDF simulationscustom scriptinglow power designhigh performance design

Certifications

Bachelor's degreeMaster's degreePhD