SiPearl

Engineer

• Analyse and optimise benchmark and application codes to leverage SiPearl processor architectures
• Design, run, and monitor test scenarios, collect and validate performance results
• Produce detailed performance analyses and forecasts for pre-silicon, simulation and silicon phases
• Identify and fix software issues impacting benchmarks and applications
• Package, document and present benchmark results and improvements internally and externally
• Contribute to collaborative R&D projects with academic and industrial partners

Benchmark Cloud & HPC Engineer

• Improve and implement innovative features in compilers, libraries, and development tools based on SiPearl’s product specifications.
• Detect, correct, and generalize software issues impacting SiPearl products, and deliver robust toolchains.
• Participate in collaborative and partnership projects, contributing to development, testing, validation, and delivery of project deliverables.
• Conduct software monitoring in compilers, libraries, and tools, sharing insights internally to guide team decisions.
• Mentor interns, define project topics, and handle administrative aspects related to internship supervision.

Compiler Engineer

Full-stack Engineer

• Ensure the reliability and proper functioning of Linux kernels and distributions for Rhea processors
• Define and coordinate testing strategies across multiple hardware interfaces
• Contribute to kernel integration and validation and actively participate in collaborative projects
• Analyze system and product documentation to design and improve Linux kernel features
• Draft kernel specifications, testing plans and implement innovative kernel functionalities
• Test, validate and integrate kernel changes into the ecosystem
• Investigate and resolve critical software issues, contributing fixes to standard Linux distributions
• Collaborate on projects, contribute to development, porting, validation and delivery
• Perform technology intelligence on Linux kernels and modules
• Mentor and supervise trainees
• Maintain, update and upgrade internal Yocto layer

Linux Kernel Engineer

Architect

• Define IP, subsystem and SoC architectures to meet performance, silicon area, cost and manufacturing constraints
• Break down architectures into functional sub-blocks and write high-level architecture specifications, including interfaces and configuration mechanisms
• Participate in commercial IP selection and process technology choices
• Provide detailed definitions of software programming and configuration interfaces
• Support RTL, physical design, verification, virtual and software prototyping teams by clarifying architectural intent and constraints
• Review microarchitecture specifications, verification strategies and validation plans
• Interface closely with marketing and product teams to ensure architectural alignment with roadmap and customer needs
• Contribute to technology intelligence, monitoring standards, market trends and emerging technologies
• Represent the company at seminars, conferences and technical forums, and share key learnings internally
• Take ownership of work packages in collaborative and partnership projects, acting as a technical point of contact
• Coordinate project deliverables and contribute regularly to partner exchanges
• Mentor, coach and technically supervise junior engineers, trainees and service providers
• Contribute to effort estimation, milestone planning, onboarding and training programs
• Support the manager in supervising team members within the defined scope

Senior IP Subsystem SoC Architect

• Define and evolve the ASIC development methodology and design flow based on user needs and project constraints
• Lead the evaluation, deployment and optimization of EDA tools and internal automation
• Supervise or contribute to the development, validation and performance optimization of tools, utilities and scripts
• Provide expert-level support to development teams and collaborate with IT on efficient working environments
• Act as the primary technical interface with tool vendors and external partners
• Document, present and promote best practices and methodologies across teams
• Mentor and coach engineers while contributing to planning, roadmap and technology watch activities

Senior CAD Flow Engineer

Technical Project Manager

• Partner with engineering teams to define project startup requirements, including participating entities and the design database bill of materials (BOM).
• Specify and drive infrastructure setup aligned with engineering workflows while ensuring full compliance with export, IP, and contractual requirements.
• Collaborate closely with trade compliance, IT, legal, procurement, HR, and engineering to ensure policy alignment and smooth execution.
• Guide engineering, program management, and IT teams through end-to-end project setup and enablement.
• Work with technical and program stakeholders to manage scope changes, proactively assessing infrastructure impacts and adjusting plans as needed.
• Establish and maintain governance frameworks to standardize estimation, enablement, reporting, and audit processes.
• Improve operational efficiency through the deployment of automation solutions for enablement, tracking, reporting, and compliance auditing.
• Define, monitor, and report key performance indicators, providing leadership with clear insights into cost, quality, and delivery.
• Identify and mitigate risks related to export control regulations, third-party IP agreements, and internal IP policies.

• Define the verification platform architecture (UVM/SystemVerilog, C/C++, Python…)
• Develop and maintain test environments, verification benches, and functional simulations
• Plan, prioritize, and track verification activities throughout the development cycle
• Lead and mentor a team of verification engineers
• Collaborate with system architects, design teams, and embedded software teams.