Marvell Technology

Full-stack Engineer

• implementing DFT/Test on complex IP and SOC for multiple custom/compute ASIC/SoC designs
• running Tessent tools for insertion of all DFT structures
• enhancing DFT methodologies and tools
• chiplet DFT solutions, including Tessent SSN
• definition of STA constraints, pattern generation & post-silicon bring-up and debug
• mentoring, guiding, and driving a small team of DFT engineers

Principal Engineer – Design For Test

Engineer

• Create accurate and efficient functional models for simulating System-on-Chip (SoC) designs
• Collaborate closely with software teams
• Diagnose and resolve issues observed in firmware by analyzing simulation results
• Actively promote the adoption of virtual platforms within the company

Senior Staff Simulation Engineer

• Architect, design and develop system software for reliable, scalable, high performing network and storage systems using C/C++
• Plan, schedule, estimate efforts for projects and provide technical guidance to junior engineers during execution
• Designing and Developing using Linux
• C/C++, Python
• Prototyping new modules for new co-processor architecture
• Profiling HW performance and programming interfaces
• Unit testing various modules, and running required System and Integration tests using Python

Senior Embedded Software Engineer – Linux Kernel Driver Development

Mechanical Engineer

• Design and validation of FET and BiCMOS circuits for high-speed broadband ICs
• Active-circuit design
• Design of leading edge transimpedance amplifiers, using both SiGe BiCMOS and the most advanced CMOS FinFET technologies
• Development of transmission line structures and other millimeter wave structures to enable higher performance
• Design of high-performance broadband analog circuits for optical front-end receivers
• Work with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support

Principal Analog Mixed-Signal Design Engineer – Optical

Infrastructure Engineer

• Design, implement, and maintain large-scale HPC clusters for EDA workloads, ensuring high availability, fault tolerance, and efficient resource utilization.
• Manage, configure, and optimize LSF job scheduling systems to support diverse verification workflows.
• Develop, automate, and monitor deployment, configuration, and operational processes for EDA infrastructure.
• Collaborate with EDA engineers and designers to refine verification flows to run optimally on the grid.
• Implement and advance CI/CD pipelines to streamline the deployment, testing, and monitoring of infrastructure and EDA flows.
• Provide troubleshooting and support for users and the infrastructure.
• Monitor infrastructure health, performance, and usage; proactively identify, resolve, and document issues.
• Ensure compliance with security best practices, license management, and data protection requirements.
• Contribute to architectural innovation and process improvement for future scalability and efficiency.
• Participate in incident management teams for prompt issue resolution.

EDA Infrastructure Engineer

• Evaluating package or PCB designs for challenging electrical requirements
• Close interaction with physical designers and IP teams to optimize electrical performance
• Executing simulation tasks for signal and power integrity sign-off
• SI/PI analysis of designs and optimization within 2D/2.5D/3D packages
• Interfacing with product design teams for optimized floor-planning, package related design input and power delivery network design
• Performing wiring studies to determine optimal signal routing, power delivery verification and package size determination
• Documenting analysis results and presenting findings to internal teams
• Participating in cross-functional meetings and design reviews
• Taking ownership of assigned tasks and following through to completion

Senior Staff Engineer – Advanced Packaging SI/PI

Marketing

• Own and drive the end-to-end delivery of marketing technology initiatives from conception through implementation and continuous improvement
• Plan, prioritize, and execute technical roadmaps that align with brand strategy while ensuring operational stability
• Lead and deliver the technical architecture and implementation of customer-facing applications while balancing new development with ongoing maintenance
• Own stakeholder management through clear communication of both technical constraints and business opportunities
• Establish and maintain proactive monitoring and support processes to ensure marketing platforms operate at peak performance
• Develop and implement comprehensive project plans that address both new enhancements and operational requirements
• Oversee daily operations of the marketing technology stack, ensuring minimal disruption while implementing improvements
• Take accountability for quality assurance and testing processes across all customer-facing applications
• Drive continuous enhancement of digital customer journeys while maintaining operational stability

Principal Marketing Technology Solutions Lead

• Work on verification of memory subsystems of Marvell's AI/ML, Network processing, Compute, Memory Expander and Accelerated Compute SOCs and IPs
• Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers using System Verilog and UVM methodology
• Analyze designs and architectures to develop test strategies that will ensure functional correctness
• Develop verification testplan and write tests using random techniques and coverage analysis, and work with designers to ensure it is complete
• Debug failures and work with designers to resolve issues
• Contribute to the development and future direction of SoC verification methodologies and environments
• Provide leadership for a geographically dispersed team of verification professionals in pre-silicon validation of a highly complex SoC design

Technical Lead, Design Verification – Sr. Principal Engineer

Designer

• Provide backend design service for multiple Marvell SOC design groups
• Participation in or leading cutting-edge physical design methodology and flow development
• Managing a team of physical design engineers on project level
• Lead and mentor a team of engineers, fostering an environment of technical excellence and collaboration
• Provide strategic technical direction and oversight, ensuring successful execution of design to meet project milestones
• Act as a key interface between senior leadership and your team, translating high-level objectives into actionable technical and project plans
• Guide professional development of team members through coaching, training, and performance evaluations

Senior Staff Manager, Physical Design

Data Analyst

• Generate and maintain product P&L through the quotation process
• Collaborate with the broader CCS team to refine and document internal processes
• Drive cross-functional teams to provide quality, well-documented inputs to the quote and forecast processes in a timely manner
• Identify process inefficiencies and work collaboratively with cross-functional teams to drive improvements

Senior Business Operations Analyst – Finance, Data Analytics, Costing, Pricing

Threat Intelligence Specialist

• Gather primary market intelligence across semiconductor segments: Foundry, logic, and advanced nodes
• Conduct competitive intelligence on key local providers
• Monitor expansion plans, supply-chain constraints, and emerging bottlenecks
• Develop comprehensive insights into semiconductor technology advancements, including manufacturing roadmaps
• Analyze publicly available financial and operational data to understand industry health and company performance
• Generate clear, concise written insights for internal stakeholders
• Develop working relationships with ecosystem participants (manufacturers, suppliers, associations, industry analysts and financial analysts)
• Attend semiconductor conferences, trade shows, and technical seminars to gather intelligence

Principal Financial Analyst – Market Intelligence

Technical Program Manager

• Responsible for the management of program execution and its day-to-day activities.
• Lead and ensure programs are executed to plans and customer issues are handled properly to ensure total customer satisfaction.
• Manage the cost, schedule, and technical performance requirements of all programs through all phases from MRD/PRD through design, NPI, and ramp to stable production to achieve key business and financial objectives for orders, revenue recognition, operating income, and cash flow for new or current programs.
• Establishes milestones and monitors adherence to master plans and schedules, identifies program problems, and obtains solutions, such as allocating resources or changing product specifications.
• Partners with engineering on design concepts, criteria and engineering efforts for product research, development, integration, and test.
• In collaboration with engineering and marketing, expands the product line with the customer.
• Supports field sales, solves problems, and improves profitability of assigned product lines.

Engineering Program Manager – Silicon Product and IP Development

Financial Planning and Analysis

• responsible for the company's financial planning, forecasting, and delivering value-added business analysis
• defining and reporting financial and operational metrics that drive accurate, insightful business decision-making
• oversee financial partnership with the Data Center Networking organization
• developing comprehensive understanding of all key business drivers and building sophisticated financial and allocation models
• work closely with other senior executives to drive efficient and effective processes in the annual strategic portfolio review
• monitor ongoing performance against objectives; identify incipient problems and initiate appropriate corrective action
• drive the budgeting processes and optimize expense management within the business
• support the month end accounting close processes and lead the preparation of all financial materials for management and operational reviews
• embed a culture of proactive risk management across the organization
• partner with General Accounting to ensure a culture of integrity and controllership
• provide leadership to the FP&A team, constantly raising the bar of expectation

Director, Finance

Security Engineer

• Define and articulate Marvell’s enterprise Product Security vision, strategy, and priorities in a clear and compelling manner.
• Communicate product security risk, trends, and recommendations to executive leadership in business-relevant terms.
• Prepare and deliver executive-level presentations that enable informed risk and investment decisions.
• Establish trusted relationships with senior leaders across engineering, product, legal, and operations.
• Own the enterprise Product Security strategy and multi-year roadmap spanning all product lines.
• Establish company-wide product security policies, standards, and governance models applied consistently across organizations.
• Drive alignment and accountability for security outcomes through partnership and influence.
• Partner closely with engineering, architecture, product management, quality, legal, supply chain, and operations teams.
• Enable teams to integrate security-by-design practices through guidance, tooling, and shared accountability.
• Act as a connector across organizations to resolve security issues that span multiple teams or products.
• Establish an enterprise product security risk management framework that enables consistent identification, prioritization, and treatment of risk.
• Translate technical vulnerabilities and architectural risks into clear business and customer impact assessments.
• Support executive decision-making by framing risk tradeoffs, mitigation options, and residual risk acceptance.
• Provide ongoing visibility into enterprise risk posture, emerging threats, and systemic issues.
• Serve as the executive owner of Marvell’s Product Security Incident Response Team (PCIRT).
• Lead cross-functional response to significant product security incidents, including executive briefings and customer communications.
• Oversee coordinated vulnerability disclosure and engagement with external researchers, customers, and partners.
• Ensure consistent, accurate, and timely security communications during incidents.
• Build and lead a core product security and PCIRT leadership team while operating within a federated model.
• Develop security champions and trusted partnerships across engineering organizations.
• Foster a culture of transparency, accountability, and proactive risk management across Marvell.