Intel Corporation

Engineer

• Maintains, tests, debugs, optimizes, secures, and/or evaluates OS Kernel and system software
• Utilizes knowledge in software architecture, design, debug, development, operating system internals, and silicon on platform features

Staff OS Kernel Engineer

Designer

• Perform SOC level timing analysis and optimization, ensuring designs meet functional and performance requirements.
• Generate and verify timing constraints while addressing timing violations at the chip or block level for SoCs.
• Conduct timing rollups and develop optimized clock networks for functionality, performance, and power efficiency.
• Define methodologies to produce high-quality timing models and enable efficient physical design execution.
• Establish the appropriate process, voltage, and temperature (PVT) conditions for timing analysis, aligning with product plans, and binning strategies.
• Work closely with the clocking team and full-chip designers to balance timing fixes, power delivery, clocking, and partitioning.
• Collaborate with architecture, clocking design, DFT and logic design teams to develop flows for chip integration and validate clock network performance guidelines.
• Contribute to the development of tools, flows, and methodologies that enhance SoC physical design and timing processes.

SOC Physical Design, Static Timing Analysis Engineer

Financial Planning and Analysis

• Serve as a key financial professional within the Construction Division Finance team
• Support operational excellence and strategic decision making
• Own settlement analysis and reporting processes
• Ensure accurate cost allocation and strong financial controls across projects
• Play an active part in month end closing, forecasting, and POR activities
• Partner closely with project, supply chain, and central finance teams
• Support contract approval and financial review processes within your assigned region

Finance Settlement and Supply Chain Analyst

Manager

• Develop and execute multiyear commodity strategies informed by industry and market dynamics to meet business objectives.
• Collaborate with cross-functional teams to efficiently acquire materials and services in a cost-effective and timely manner.
• Negotiate purchasing contracts, statements of work, and pricing for goods and services.
• Conduct periodic executive reviews of strategies and pivot as needed to address evolving market conditions.
• Identify opportunities for cost savings and drive initiatives with suppliers and internal stakeholders.
• Manage supplier relationships globally, including business continuity planning and supplier development.

Fab Equipment Maintenance Commodity Manager

• Lead and manage strategic supplier relationships
• Manage production schedules, urgent material procurement, and logistical bottlenecks
• Develop, implement, and execute commodity strategies
• Oversee material procurement timing and distribution
• Identify disruptions in supply and drive action items
• Create robust negotiation strategies
• Influence supplier evaluation and selection
• Anticipate business risks and lead mitigation strategies
• Educate internal stakeholders on compliance policies
• Inspire and lead teams

Substrates Supply Manager

Mechanical Engineer

• Design, analyze, and debug CPU circuits at transistor level with increasing ownership
• Contribute to circuit-level implementation, optimization, and debugging across design stages using both manual design techniques and automation tools
• Perform power, performance, and area (PPA) analysis and drive design trade-offs for IP blocks
• Participate actively in design reviews, quality checks, and post-silicon debug support
• Collaborate with cross-functional teams including synthesis teams, Front End design (RTL), and layout
• Apply and help refine Intel circuit design methodologies and automation flows for IP development

CPU Circuit Design Engineer

• Join Intel's development center in Haifa or Petah Tikva, designing VLSI products.
• Develop Intel High Performance Processor (P-Core).
• Focus on process and construction technology.
• Conduct physical design flow, including synthesis and timing analysis.
• Analyze results and make recommendations for future needs.
• Improve physical design methodologies.

CPU Structural Design – Technology and Pathfinding

• Cost reporting including commits approval and tracking at the detailed WBS level.
• Lead monthly project forecast development, funding requests and reporting.
• Enforcing project controls incorporating the schedule, productivity, Earned Value.
• Leads the estimate development.
• Driving process improvements.
• Presenting financial updates to project/senior management with confidence.
• Influencing cost reduction cash savings opportunities using financial analysis skills.
• Leading and consolidating project Close and POR (Financial Plan of Record) submissions.
• Partner with Procurement team on various commercial activities such as Request For Proposal (RFP) to ensure optimized cost for construction projects.
• Sponsoring Intel 3rd Party Quantity Surveyor in driving accurate quantity measures and local market cost benchmarking in Intel Projects.
• Drives cost reduction strategies and interfaces with local levels of management, customer finance and capital finance.
• Ensures compliance with reporting standards, local and corporate policies and the integrity of external and internal reporting.
• Provides varying levels of advice and cost information to operational business groups or factories to drive the business decision-making process.
• Supports business by closing the books, analyzing variances and trends, and developing project forecasts that are consistent with the business objectives of the organization.
• Provides information and counsel in the areas of controls/risk management, claims mitigation, budgeting and planning, pricing, cost, marketing strategies, return on investment decisions, and the development of overall business plans and strategies.
• Interprets information for and negotiates with clients and customers both internal and external to the organization.
• Provides input to management including department heads, operational managers, other departments, and senior management.

Project Controls Engineer

• Perform analog and custom layout design for assigned blocks under supervision
• Implement layouts using Virtuoso / Custom Compiler or equivalent tools
• Run and debug physical verification checks, including: DRC, LVS Density and reliability checks EM/IR (RedHawk / Totem or equivalent) ESD and Latch up checks (as applicable)
• Follow layout constraints provided by circuit designers and layout leads
• Support layout iterations, ECOs, and signoff closure
• Adhere to established methodologies, checklists, and quality standards
• Document layout issues and support reviews with senior engineers

Graduate Talent – Analog Layout Engineer

• DDG-MYS Client SOC Team is looking for highly passionate new talents to work on Intel next generation Client SOC development as SOC RTL/Logic Design Engineer.
• Contributing to the latest Intel Client family of products.
• Collaborate with verification team for functional/feature/integration validation.
• Perform FE Quality checks in various logic design aspects ranging from RTL static checks to RTL synthesizability check, timing/power convergence, netlist quality check, FEV and many more.

SOC Logic Design Engineer

Account Executive

• Develop and execute long-term strategic plans for America Movil across LATAM region
• Lead and coordinate distributed teams of Account Executives and Engineers throughout LATAM
• Build and maintain C-Suite and senior executive relationships within America Movil
• Drive preference for Intel architecture through solution-oriented approaches
• Manage ecosystem partnerships with OEMs, TEMs, ISVs, and other key partners
• Execute account planning and delivery to exceed revenue and forecasting goals
• Conduct executive briefings and manage executive sponsorship programs
• Advocate internally for customer needs and drive customer satisfaction initiatives

Strategic Account Executive – Telecommunications

Operations

• Manage suppliers for the storage or movement of inbound, interplant, and outbound material, equipment, and finished goods.
• Monitor and benchmark supplier services against SLAs and guide suppliers to evolve service levels in line with Intel requirements.
• Own KPIs such as GPI, CDD/POD adherence, cost per box/carton/pallet/sqft/transaction/head, and quality metrics. Report progress against agreed schedule, scope, cost, and quality constraints to senior leaders regularly.
• Oversee bonded and LMW warehouse operations for KM ramp, including space optimization, pallet inflow management, and surge coverage during conversion windows.
• Gather data on existing processes, analyze defects and inefficiencies, and implement best practices.
• Utilize analytical and advanced technology skills (including automation and AI) to develop logistics solutions that optimize Intel's business execution.
• Support SAP/WMS changes (plant codes, bin management, label/MMID hygiene) and ensure customs/trade compliance for bonded and LMW flows.
• Track and resolve shipping, warehouse, and carrier errors, as well as logistics exceptions, ensuring minimal impact on customer service.
• Build strong relationships with cross-functional teams and logistics service providers to ensure smooth process flow and efficient delivery of products to customers.

Logistics Operations Manager

Architect

• Work in dynamic team environment hand in hand with design, validation, and architecture teams to deliver best-in-class performance and innovations across the XEON CPU and AI portfolio.
• Determine, specify and evaluate the viability of complex hardware features and structures to ensure software and hardware designs interface correctly.
• Design framework for particular functions.
• Define, document and test processes for inclusion into technical platforms, subsystem specifications, input/output and working parameters for hardware and/or software compatibility.
• Identify, analyze and resolve subsystem and/or SoC design weaknesses.
• Influence the shaping of future products by significantly contributing to the architecture used across design families.

SOC Performance Architect

Solutions Engineer

• Define and execute advanced-node backend‑of‑line (BEOL) integration strategies.
• Deliver sustained, organization‑level impact and resolve high‑complexity integration challenges.
• Drive cross‑technology process synergy strategies and align process integration.

Integration Engineer

• Contribute to the design, simulation, and verification of digital and/or analog circuits.
• Support schematic entry, timing analysis, and optimization for power, performance, and area.
• Assist in ensuring robust circuit implementation and integration.
• Collaborate with cross-functional teams to achieve design goals and meet project timelines.
• Participate in hands-on learning opportunities and projects that align with Intel's business objectives.