Delos Data

Systems Engineer

• Collaborate across the stack to influence the design of our foundational technology, ensuring it meets the needs of next-generation AI models.
• Identify and resolve performance bottlenecks in distributed training and inference workloads through deep-dive analysis of the software-hardware interface.
• Conduct rigorous performance benchmarking and characterization on multi-node clusters.

System Software Engineer – AI

Mechanical Engineer

• Own hardware schematic design for multi-phase buck regulators, point-of-load converters, and power sequencing circuitry.
• Select critical power components, including passives, inductors, power stages, controllers, and supporting circuitry.
• Define placement and routing constraints for board-level power delivery networks, including decoupling capacitor strategy and high-current power paths.
• Work closely with package engineering to ensure clean power delivery handoff at the socket or package interface.
• Lead lab validation of power subsystems, including VRM efficiency, loop stability, DC IR drop, thermal behavior, and transient response.
• Use oscilloscopes, electronic loads, network analyzers, thermal cameras, and related lab equipment to characterize power rails under maximum dynamic load conditions.
• Partner with SI/PI engineers to measure and mitigate power supply noise and Power Supply Induced Jitter on sensitive high-speed lanes.
• Debug power integrity issues across board, package, silicon, firmware, workload, and system-level interactions.
• Contribute to design guidelines, validation plans, and best practices for power delivery across the company’s hardware platforms.

Principal Power Design Engineer

Electrical Engineer

• Lead schematic design, component selection, and power‑tree definition for complex server and data‑center boards.
• Define system architecture, high‑speed interface requirements, power delivery strategy, and thermal/mechanical constraints.
• Develop boards and systems supporting CPUs, accelerators, memory subsystems, high‑speed IO, and advanced power architectures.
• Work closely with Taiwan ODMs on design reviews, issue resolution, schedule alignment, and manufacturing readiness.
• Support customer technical discussions, requirements gathering, and design‑in activities.
• Collaborate with SI/PI teams to ensure compliance for PCIe, CXL, Ethernet, UCIe, CPO, and other high‑speed links.
• Lead board bring‑up, debug, and system‑level validation using scopes, logic analyzers, and protocol analyzers.
• Partner with packaging, SI/PI, firmware, and mechanical teams to deliver fully integrated systems.
• Drive DFM/DFT reviews, support factory builds, and resolve production issues with ODM partners.

Principal Electrical Engineer

• Board Architecture & Design — Lead schematic design, component selection, and power‑tree definition for complex server and data‑center boards.
• System‑Level Design — Define system architecture, high‑speed interface requirements, power delivery strategy, and thermal/mechanical constraints.
• Data Center & Server Hardware — Develop boards and systems supporting CPUs, accelerators, memory subsystems, high‑speed IO, and advanced power architectures.
• ODM Engagement — Work closely with Taiwan ODMs on design reviews, issue resolution, schedule alignment, and manufacturing readiness.
• Customer Interaction — Support customer technical discussions, requirements gathering, and design‑in activities.
• High‑Speed Interfaces — Collaborate with SI/PI teams to ensure compliance for PCIe, CXL, Ethernet, UCIe, CPO, and other high‑speed links.
• Validation & Bring‑Up — Lead board bring‑up, debug, and system‑level validation using scopes, logic analyzers, and protocol analyzers.
• Cross‑Functional Collaboration — Partner with packaging, SI/PI, firmware, and mechanical teams to deliver fully integrated systems.
• Manufacturing Support — Drive DFM/DFT reviews, support factory builds, and resolve production issues with ODM partners.

Senior Staff Electrical Engineer

Engineer

• Develop, implement, and maintain RTL verification environments using UVM or equivalent methodologies
• Create and execute coverage-driven verification plans aligned with design specifications
• Develop directed and constrained-random test cases and sequences to validate functionality and identify corner cases
• Analyze simulation results, debug complex verification and design issues, and perform root-cause analysis in collaboration with RTL design engineers
• Implement and track functional and code coverage, driving verification to closure
• Develop reusable verification components and write SystemVerilog Assertions (SVA)
• Participate in design and verification reviews, providing input on design testability, correctness, and optimization
• Automate regression testing and enhance verification infrastructure using Python and scripting
• Contribute to continuous improvement of verification processes, tools, and methodologies

Verification Engineer

Application Engineer

• Lead technical pre‑sales engagements for Nonstop AI ™ software products
• Drive early‑access and production deployments
• Provide hands‑on post‑sales support for customers running Delos Nonstop AI™ in production
• Partner with sales and marketing team to lead technical discovery, solution design, and product demonstrations of Delos Data’s AI infrastructure software
• Own proof‑of‑concept, early‑access, pilot and production deployments end‑to‑end: scoping, success criteria, execution, and conversion to production
• Develop and deliver technical presentations, architecture proposals, and competitive evaluations for engineering and executive audiences
• Respond to RFPs/RFIs and build the technical justification that supports customer purchase decisions
• Provide hands‑on post‑sales support for production deployments, including integration, troubleshooting, performance tuning, and escalation management
• Guide customers through software upgrades, cluster expansion, and new feature adoption
• Develop runbooks, integration guides, and best‑practice documentation tailored to customer environments
• Serve as the technical escalation point between customer operations teams and Delos’ engineering
• Build and maintain deep technical relationships with infrastructure, SRE, and platform engineering teams at hyperscale, neocloud, and AI labs customers
• Navigate the unique requirements of these environments: multi‑tenancy, custom hardware fleets, extreme scale, strict SLAs, and bespoke integration needs
• Align customer deployment milestones and operational needs with Delos product release cycles
• Channel structured field feedback for feature gaps, bugs, competitive intelligence into product and engineering
• Build demo environments, reference architectures, and technical collateral for the sales organization
• Represent Delos Data at industry events, customer briefings, and technical workshops

Field Application Engineer

Product Marketing

• Own the bridge between our deeply technical products and customers, developers, and decision‑makers
• Develop and own the end‑to‑end product marketing strategy for Delos Data's hardware and software portfolio
• Conduct market, customer, and competitor research across the AI infrastructure landscape
• Partner with founders, product, and sales to plan launch milestones
• Define and track success metrics for marketing initiatives
• Create the core messaging framework for Delos Data
• Ensure messaging consistency across all customer touchpoints
• Create high‑impact sales and marketing collateral
• Lead content development for the Delos Data website
• Produce content for media and analyst engagement

Product Marketing Manager

• Perform pre‑ and post‑layout SI simulations (eye diagrams, crosstalk, insertion/return loss) for UCIe, D2D, SerDes, and Ethernet links.
• Model PDNs for low‑voltage, high‑current rails; run AC/DC, impedance, and IR‑drop simulations; come up with decoupling cap selection.
• Build and validate S‑parameter, IBIS‑AMI, and behavioral models for packages, PCBs, sockets and cables.
• Guide PCB/package layout teams on stack‑ups, routing constraints, return‑path continuity, and decoupling strategy.
• Conduct bring‑up, VNA/TDR measurements, oscilloscope validation, and correlate hardware results with simulations.
• Collaborate with IC design, packaging, and board teams to define electrical requirements and debug issues.
• Evaluate new SI/PI methodologies, materials, and tools for next‑generation architectures.
• Evaluate emerging interconnect technologies such as CPC, CPO, and establish electrical-optical-electrical end-to-end simulation and validation methodologies.

Principal Signal and Power Integrity Engineer

• Select and design optimal multi‑die package types (MCM, 2.5D, 3D, fan‑out, CoWoS, InFO, CPC, CPO) balancing electrical performance, thermal behavior, cost, and manufacturability.
• Define package specifications, bump map and ball map, interposer requirements, and mechanical constraints.
• Define substrate stack‑ups, bump pitch, ball pitch, routing, via structures, and material choices for performance and manufacturability.
• Perform high-speed signal escaping, routing and power distribution network design.
• Manage subcontractors and work directly with TSMC and/or OSAT on bumping, substrate options, and advanced packaging flows.
• Partner with IC design, physical design, SI/PI, and board teams to ensure package requirements meet system‑level needs.
• Evaluate emerging packaging technologies and drive adoption for next‑generation products.
• Support package‑level bring‑up, failure analysis, debug and qualification.