Hardware Engineer

• Verify the design and implementation of the industry's leading GPUs
• Responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM
• Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design
• Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks

ASIC Verification Engineer – GPU

• Own and define the vehicle system FPGA related architectures, standards, practices, processes, tools, etc.
• Develop system digital computing architectures and requirements in collaboration with other engineering disciplines including defining HW/SW interfaces between fabric logic and processing subsystems.
• Lead the FPGA Engineering team of 3+ people in the development and delivery of Astrolab FPGA RTL design and verification.
• Support FPGA Engineering direct reports through their technical work, performance evaluations, and career growth.
• Own unit level RTL development from blank sheet to flight for Microsemi, Xilinx, or other FPGA or SoC devices in either Verilog or VHDL.
• Perform design verification including simulations, test benches, timing analysis, and hardware testing.
• Lead design reviews, demonstrate requirement traceability, and create documentation for FPGA operation and interfacing with other SW and FPGA systems.
• Lead and participate in test campaigns ranging from unit level manual tests, unit automated tests, and system level tests.

Lead FPGA Engineer

• Develop, lead, and own digital, analog, and mixed-signal circuit avionic designs that interact with avionics systems (including sensors and electromechanical/electrohydraulic actuators).
• Own these avionics designs, and the rugged electronic hardware assemblies across the entire product life cycle, from concept and requirements definition, design, analysis, prototyping, schematic capture, layout, design review, test/verification (power-on, functional / acceptance / qualification testing) and through release to production.
• Support avionics controller architecture trade studies, analyses, performance characterization and specification, device selection, and controller roadmap direction.
• Support controller risk analyses, failure modes effects and criticality analyses (FMECA), design for test/manufacture/cost (DFx), and root-cause analysis of test discrepancies.
• Participate in program level technology development, mission assurance and safety initiatives, and avionics development process improvements.
• Effectively communicate development status, risks, and challenges to management.

Avionics Hardware Engineer II

• Translate system requirements into detailed hardware design specifications, ensuring alignment with firmware and software requirements.
• Design and develop hardware modules and systems for low-power, small-scale devices operating in challenging environments.
• Collaborate with Firmware and Software Engineers to ensure seamless integration of hardware with tracking and sensor telemetry applications for LPWAN or Cellular IoT networks.
• Develop and execute testing protocols to verify the end-to-end functionality of prototype devices, including hardware, firmware, and connectivity.
• Participate in technical design reviews, providing input on system architecture and deployment strategies to optimize hardware performance.
• Conduct simulations and prototyping to validate hardware designs and ensure compliance with system specifications and environmental constraints.
• Continuously explore and implement improvements to hardware development processes, enhancing performance, reliability, and efficiency.
• Provide technical leadership and guidance in hardware engineering, ensuring best practices in design, testing, and deployment across the team.

Senior Hardware Engineer

• Work on cutting edge, next generation routers powering AI buildout
• Responsible for taking networking system requirements and mapping them into functional blocks for FPGA implementation
• Collaborate with the cross-functional team to address development requirements
• Participate in validation of the system and release to manufacturing
• Work on the High-End Routing team that designs the ASR8000 routers
• Member of the FPGA team that designs control path FPGAs for various boards
• Interface with Diagnostics, Software, Board design, Manufacturing and Hardware Qualification teams

Hardware Engineer – FPGA

• Impact the product development from the lowest levels of circuit design to large system design.
• See your contribution all the way through to high volume manufacturing.
• Creative Hardware Engineering positions are available in: ASIC Design and Verification, System/Board Design, Circuit Board Layout, Hardware Automation, Validation and Test, Signal Integrity, Power Design.

Hardware Engineer II - Co-op

• Specify technical product documentations and lead reviews
• Architect system block diagrams with major Networking ASIC suppliers
• Design Networking Switches, review schematics/layout review, bring-up, troubleshooting, design validation, and build yield bring-up with tier one ODM/JDM partners
• Work with major component supplier on the next generation high-performance and cost-effective technology
• Collaborate with world class product management and Software platform team to develop next generation product definition
• Work closely with cross functional team (ID/ME/Compliance/SCM) in each NPI phases and bring the product to the market
• Triage, debug, and root cause major customer issues during sustaining stage
• Participate any process improvement and innovation

• Support server products across production lines and customer data centers
• Build and maintain test fixtures
• Execute testing and triage issues with design, manufacturing, and customers
• Assist in system bring-up and debugging
• Drive daily issue triage and containment
• Write and maintain debug procedures for production screening

• define and design the next generation Hyperscaler Switch hardware
• responsible for system and board level specification, schematic capture, FPGA design
• perform ASIC/System level bring-up and troubleshooting
• debug and troubleshoot in labs using scopes and analyzers
• act as technical liaison with major component suppliers

Hardware Engineering Lead

• Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
• Developing System Verilog/UVM based communication protocol components,
• Working on test plan based on functional requirements as well as applicable standards requirements
• Working with experts of different areas to ensure the most competitive solutions
• Cooperating with system engineers, HW/SW development, suppliers and other relevant functions to solve technical issues
• Supporting HW/SW bring-up and debug

Staff Engineer – ASIC Verification

• Implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs
• Development of innovative DFT IP in collaboration with the multi-functional teams
• Enabling the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows
• Participating in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die
• Crafting solutions and debug with minimal mentorship

ASIC DFT Engineer

• Developing timing constraints at block, sub-chip, and full-chip levels in test modes
• Performing quality checks such as duplicated constraints, promotion/demotion between block and top level SDCs
• Checking timing for unconstrained endpoints, no clock, etc.
• SDC validation, CDC check, and SDC flow development
• Developing methodologies, guidelines, and checklists to streamline STA work, resolve design and flow issues, and drive execution to ensure progress and accuracy

ASIC DFT STA Engineer

• Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms
• Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products
• Design, document, and develop ASIC subsystems for release in high volume and quality
• Help define the process, methods, and tools for design and implementation of complex developments
• Leads the CDC/RDC (Clock Domain Crossing / Reset Domain Crossing) methodology in silicon one chips
• Design & implement robust and reusable RTL with CDC/RDC considerations
• Spec comprehensive CDC/RDC check flows and work with CAD team to implement
• Review and approve CDC/RDC constraints and waivers
• Perform static glitch analysis
• Improve design with prevention of static glitch hazard

ASIC Engineering Technical Leader – CDC

• Develop, test, deliver, document, and maintain BMC firmware features and related components.
• Develop Linux applications and kernel drivers and perform debugging and troubleshooting for firmware-related issues.
• Support BMC firmware and software components during the planning, development, and validation phases of the program.
• Collaborate closely with research, design, validation, and other cross-functional teams.
• Work closely with vendors on product integration, debugging, and issue resolution based on specifications and customer requirements.
• Guiding and mentoring junior engineers, as needed.

Firmware Engineer

• Lead the design and validation of high-performance analog and mixed-signal hardware for next-generation products
• Design, simulate, and verify board-level circuits for high-frequency test and measurement products
• Define and implement project plans, manage milestones, and lead technical reviews
• Own technical deliverables, guide design decisions, and drive resolutions of issues
• Develop validation strategies and characterize circuitry using lab instruments
• Collaborate with various teams to deliver integrated product success
• Mentor engineers in analog and mixed-signal design practices
• Travel up to 10% domestically or internationally to support activities

Principal Analog Hardware Engineer

• Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production
• Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts
• Proactively assess potential risks to the design quality and project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions
• Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom’s stringent tape-out quality standards
• Motivate and drive yourself to stay abreast of developments in Broadcom IPs, technology and end user applications
• Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams
• Be a consummate team player and assist other teams in need

Senior Custom ASIC Engineering Lead

• Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production
• Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts
• Proactively assess potential risks to the design quality and project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions
• Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom’s stringent tape-out quality standards
• Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams

• Work with program leadership to assess issues and develop resolutions to meet productivity, quality, and program cost/schedule objectives as well as develop and maintain metrics for monitoring the team's progress.
• Control and assign tasking within the group.
• Participate in technical reviews and ensure quality and applicability of analysis work products.
• Grow, develop, and manage a diverse team of analysis engineers.
• Interface with internal and external customers.
• Participating in ROM development, Basis of Estimates, etc., as needed.

Hardware Engineering Analysis Manager 2

• Design and develop FPGA solutions
• Collaborate with clients for effective project delivery
• Work on high-speed designs and protocols
• Provide regular reporting to customers on progress

FPGA Engineer

• Responsible for the design and development of module and vehicle level thermal assemblies from conception through development through flight operations.
• Support internal or external development of thermal components and assemblies
• Work with multi-discipline product teams to mature module and vehicle designs
• Collaborate closely with the thermal analysis group
• Work with subsystem specifications, mission environments, and design and construction standards.
• Produce outputs including component specifications, test plans, test execution reports, and test reports.
• Analyze component and assembly thermal performance using a broad spectrum of analysis techniques from classical hand calculations to Thermal Desktop models.
• Develop short-term and long-term development plans.
• Make decisions on make or buy for thermal components.

Hardware Engineer jobs in California

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ASIC Verification Engineer – GPU

Lead FPGA Engineer

Avionics Hardware Engineer II

Senior Hardware Engineer

Hardware Engineer – FPGA

Hardware Engineer II - Co-op

Hardware Engineer

Hardware Engineer

Hardware Engineering Lead

Staff Engineer – ASIC Verification

ASIC DFT Engineer

ASIC DFT STA Engineer

ASIC Engineering Technical Leader – CDC

Firmware Engineer

Principal Analog Hardware Engineer

Senior Custom ASIC Engineering Lead

Senior Custom ASIC Engineering Lead

Hardware Engineering Analysis Manager 2

FPGA Engineer

Senior Thermal Hardware Engineer – Lunar Permanence