Staff Engineer – ASIC Verification

Nokia

ASIC Verification Engineer developing test strategies for chip-level tests at Optical Networks division. Collaborating with diverse teams and resolving technical issues in leading SoCs development.

Posted 6/30/2026full-timeSan Jose • California • 🇺🇸 United StatesLead💰 $139,283 - $258,669 per yearWebsite

Core Competencies

Role fit

Core Competencies

Use this summary to align your resume positioning with the role.

Expertise in ASIC verification with a strong focus on System Verilog and UVM methodology, complemented by extensive experience in developing test plans and collaborating with cross-functional teams to deliver competitive solutions.

Highest-signal resume keywords

ASIC VerificationSystem VerilogUVM MethodologyTest Plan DevelopmentScripting Languages

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

ASIC VerificationSystem VerilogUVM MethodologyTest Plan DevelopmentCode CoverageFormal Verification ToolsAssertionsFunctional CoverageScripting LanguagesEmbedded Processor Protocols

Soft Skills

Communication SkillsTeam Collaboration

Tools & Technologies

Emulation Platforms

Industry Keywords

Functional RequirementsGeographically Diverse TeamBus Functional ProtocolsExternal Memory Interface Protocols

Tech Stack

Tools & technologies

PerlPython

About the role

Key responsibilities & impact

Working as independent contributor in development and verification of the world leading SoCs based on latest technology ASICs and FPGAs
Developing System Verilog/UVM based communication protocol components,
Working on test plan based on functional requirements as well as applicable standards requirements
Working with experts of different areas to ensure the most competitive solutions
Cooperating with system engineers, HW/SW development, suppliers and other relevant functions to solve technical issues
Supporting HW/SW bring-up and debug

Requirements

What you’ll need

Masters degree desired, Bachelor's degree in CS/EE is required.
8+ years of relevant experience in ASIC verification field.
Should have worked on developing/implementing test plans at the chip-level for complex ASICs.
Fluent in System Verilog and scripting languages such as Python or Perl.
Must have intimate knowledge of UVM methodology.
Knowledgeable about assertions and functional coverage
Experience with code coverage, formal verification tools; familiarity with evolving verification methodologies.
Very good communication skills and ability and desire to work in a geographically diverse team environment.
Familiarity with embedded processor & bus functional protocols would be bonus
Familiarity with external memory interface protocols would be a bonus
Familiarity with validation experience with any emulation platforms would be a bonus

Benefits

Comp & perks

Continuous learning opportunities
Well-being programs to support you mentally and physically
Opportunities to join and get supported by employee resource groups
Mentoring programs
Highly diverse teams with an inclusive culture where people thrive and are empowered