Lead FPGA Engineer

Astrolab

Lead FPGA Engineer developing FPGA RTL designs for Astrolab’s multi-purpose commercial planetary rovers. Collaborating with teams to enhance humanity’s presence in the solar system.

Posted 7/15/2026full-timeHawthorne • California • 🇺🇸 United StatesSenior💰 $183,000 - $230,000 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates extensive expertise in FPGA RTL architecture, development, and verification, with a strong focus on team leadership and collaboration across engineering disciplines. Proficient in Verilog, VHDL, and various verification techniques, ensuring successful delivery of complex digital computing architectures.

Highest-signal resume keywords

FPGA RTL ArchitectureVerilogVHDLTeam LeadershipVerification Techniques

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

FPGA DevelopmentDigital Computing ArchitecturesDesign VerificationTiming AnalysisUnit Level RTL DevelopmentScripting Language (TCL, Shell, Python)PCB Design UnderstandingEmbedded Software ProficiencyAXI ProtocolsCommon Bus Interfaces (DDR4, SPI, I2C, UART)

Soft Skills

Technical SupportPerformance EvaluationCareer Growth MentoringDynamic Environment Adaptability

Certifications & Qualifications

Bachelor of Science in Computer EngineeringBachelor of Science in Electrical Engineering

Industry Keywords

FPGASoCRadiation ImpactsDesign for Space Environments

Tech Stack

Tools & technologies

Python

About the role

Key responsibilities & impact

Own and define the vehicle system FPGA related architectures, standards, practices, processes, tools, etc.
Develop system digital computing architectures and requirements in collaboration with other engineering disciplines including defining HW/SW interfaces between fabric logic and processing subsystems.
Lead the FPGA Engineering team of 3+ people in the development and delivery of Astrolab FPGA RTL design and verification.
Support FPGA Engineering direct reports through their technical work, performance evaluations, and career growth.
Own unit level RTL development from blank sheet to flight for Microsemi, Xilinx, or other FPGA or SoC devices in either Verilog or VHDL.
Perform design verification including simulations, test benches, timing analysis, and hardware testing.
Lead design reviews, demonstrate requirement traceability, and create documentation for FPGA operation and interfacing with other SW and FPGA systems.
Lead and participate in test campaigns ranging from unit level manual tests, unit automated tests, and system level tests.

Requirements

What you’ll need

Bachelor of Science degree in Computer Engineering, Electrical Engineering, or equivalent.
10+ years of experience in FPGA RTL architecture, development, verification, deployment, and maintenance.
2+ years of team leadership experience as manager of direct reports.
Skilled at Verilog or VHDL.
Skilled in at least 1 scripting language (TCL, shell, Python, etc).
Skilled in verification techniques, and timing/stability analysis.
Proficiency in understanding PCB designs and reading schematics.
Proficiency in understanding embedded software.
Proficiency with AXI protocols (at least AXI4 family).
Knowledge of common bus and memory interfaces (DDR4, SPI, I2C, UART, etc).
Demonstrated success working in a dynamic environment.
Design for space environments including radiation impacts and mitigations.

Benefits

Comp & perks

Join a team of best-in-class engineers building the foundation of planetary surface exploration
Equity ownership in the company
Comprehensive health benefits, including medical, dental, vision, and mental health support
401(k) plan with company match
Flexible PTO and parental leave
Home office set up reimbursement
Fully flexible and remote friendly work environment
Weekly lunch stipend, plus complimentary snacks and beverages on-site
Once a month social hour on-site with food and drinks