Rivos Inc.

Mechanical Engineer

• Lead Technical Design: Own the end-to-end design and delivery of high-performance custom standard cells, including complex sequential, clock gating, and power management cells.
• Innovate & Optimize: Drive the design of new and innovative circuit architectures to push the boundaries of performance and power efficiency at advanced process nodes (N3/N5 and beyond).
• Mentor & Guide: Provide technical leadership and mentorship to junior engineers, fostering a culture of knowledge sharing and continuous improvement.
• Collaborate Cross-Functionally: Work closely with physical design, layout, and CAD teams to define requirements, optimize designs for PPA, and ensure seamless integration into the chip design flow.
• Validate & Qualify: Perform advanced circuit analysis, reliability checks, and SPICE simulations to validate designs across various corners and ensure compliance with all reliability standards (EM/IR, ESD, Latch-up).
• Improve Methodologies: Proactively identify and implement improvements to design methodologies, tools, and flows to enhance team efficiency and productivity.

Senior Standard Cell Design Engineer

Engineer

• Model and analyze power consumption for various workloads on custom silicon, working closely with the CPU Architecture, Performance, and Implementation teams to define overall power requirements.
• Analyze power and performance trade-offs, drive detailed cost-benefit analyses, and make recommendations for power reduction strategies.
• Collaborate with the Performance, Design Verification, and RTL teams to create targeted test vectors that model appropriate workloads and functionality scenarios for accurate simulation.
• Own the end-to-end power simulation process, including analysis, tuning, correlation, and presenting results to the Architecture, Logic Design, and Physical Design teams.
• Partner with the CAD and Physical Design teams to enhance power estimation methodologies, simulation flows, and regression analysis.

Power Engineer, Silicon

Solutions Engineer

• Positions are open for full-time in the ares of physical design and integration from sub-system level to full chip level, involving all aspects of physical design partition and integration functions.

Senior Standard Cell Design Engineer

Power Engineer, Silicon

Power Engineer, Silicon

Physical Design and Integration Engineer