Red 6

Senior FPGA Engineer

Red 6

full-time

Posted on:

Origin:  • 🇺🇸 United States • Colorado

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Salary

💰 $140,000 - $170,000 per year

Job Level

Senior

Tech Stack

Python

About the role

  • Design and implement complex FPGA modules and subsystems in Verilog or VHDL for the ATARS product line
  • Perform simulation, verification, and debugging at both block and system level
  • Handle synthesis, place-and-route, and timing closure for performance-critical designs
  • Collaborate with embedded software, systems, and electrical teams to define FPGA interfaces, requirements, and integration strategies
  • Optimize FPGA designs for performance, resource utilization, and power efficiency
  • Document designs, specifications, and verification reports for internal and customer use
  • Provide mentorship and code reviews for junior engineers
  • Contribute to FPGA design process improvements and development best practices
  • Take ownership of advanced FPGA design and verification tasks, work independently, and guide less experienced engineers
  • Ensure designs meet performance goals, integration requirements, and quality standards

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s degree preferred)
  • 6–8 years of FPGA design and development experience with proven contributions to successful product launches
  • Proficiency in Verilog, VHDL, and SystemVerilog
  • Scripting skills (Python, TCL)
  • Familiarity with C/C++ for hardware/software interaction
  • Experience with Xilinx/AMD FPGA development tools (Vivado, Vitis), simulation tools, and version control systems
  • Knowledge of high-speed serial interfaces, PCIe, Ethernet, UART, SPI, I2C, QSPI, and memory interfaces (DDR)
  • Capability to estimate FPGA resource usage and power requirements during planning
  • Strong problem-solving skills and ability to work independently on complex design challenges
  • Ability to obtain a U.S. security clearance (U.S. citizenship required)
  • Preferred: Experience in aerospace, AR/VR, or defense-related FPGA systems
  • Preferred: Familiarity with formal verification or UVM-based verification