Hardware Engineering Program Manager
Gigamon
FPGA Firmware Engineer III
Sierra Nevada Corporation
full-time
Posted on:
Location Type: Hybrid
Location: Folsom • California, Nevada • 🇺🇸 United States
Visit company websiteSalary
💰 $108,496 - $149,183 per year
Job Level
Mid-LevelSenior
Tech Stack
Python
About the role
- Implement advanced firmware designs (FPGA, SoCs, SOMs)
- Test and verification of FPGA/SoC firmware designs through simulations and during hardware/software integration
- Create detailed firmware design documentation and prepare for and conduct internal and external design reviews
- Initiate problem-solving for new and existing product designs, addressing and resolving difficult design issues on challenging projects
- Quick prototype solutions for complex and risky design elements
- Understand, plan, and execute technical activities in accordance with SNC policies, procedures, and specific customer requirements
- Develop specifications, control documents, verification and validation plans, procedures, reports, and other documentation to support design and development activities
- Maintains logs and manuals to document integration and testing
- Responsible for tracking firmware tasks within the Integrated Master Schedule and provide regular updates to the Project Engineer
- Responsible for the design and development of units from concept through qualification testing
Requirements
- Bachelor's of Science degree in Electrical Engineering or other related discipline and typically 6 or more years of relevant experience
- Demonstrated knowledge of engineering principles and practices
- Understanding of Computer Aided Engineering tools
- Experience working in multi-disciplinary design & development teams
- Basic understanding of digital circuit concepts
- Experience with FPGA HDL development, simulation and analysis, utilizing the VHDL language
- Average to Advanced experience with Microsoft Office Applications (Word, Excel, Powerpoint and Visio)
- FPGA Design Experience using VHDL, with proficiency in Xilinx FPGAs/SoCs (Ultrascale+) and development tools (Vivado, Vitis)
- Skilled in state machine design and high-speed digital bus design, including PCIe, Ethernet, USB, SPI, uSD, I2C, and serial interfaces.
- Proficient with static timing analysis for FPGA/SoC designs
- Proficient with scripting (Python, Tcl)
- Understanding of C/C++
- Hands-on experience in the lab with hardware bring-up and unit testing of FPGA/SoC design using standard test equipment
- Experience with integration/debug tools such as digital multi-meters, power supplies, oscilloscopes, logic analyzers, protocol analyzers for serial/USB/I2C/Ethernet, impedance analyzers, and FPGA debug tools (ChipScope)
- Knowledge of interface and design documentation such as Functional block diagrams, Hardware Design Specifications, Hardware Design Descriptions, test procedures, and built-in-test methodologies.
- Proven ability to work effectively in a multi-functional, interdisciplinary team environment
- Excellent verbal and written communication skills
- The ability to obtain and maintain a Secret U.S. Security Clearance is required
Benefits
- medical, dental, and vision plans
- 401(k) with 150% match up to 6%
- life insurance
- 3 weeks paid time off
- tuition reimbursement
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
FPGA designSoC designVHDLdigital circuit conceptsstate machine designhigh-speed digital bus designstatic timing analysisscriptingC/C++hardware bring-up
Soft skills
problem-solvingcommunicationteam collaborationdocumentationproject trackingdesign reviewtechnical planninginterdisciplinary teamworkadaptabilityattention to detail
Certifications
Bachelor's of Science in Electrical EngineeringSecret U.S. Security Clearance
