Powerlattice Inc

Engineer

• Responsible for the end-to-end development of advanced IC packaging solutions integrating power delivery chiplets into package substrates.
• Architect and deliver first-of-its-kind land-side assembly and embedded chiplet integration within substrate cores.
• Build packaging technologies from concept through high-volume manufacturing (HVM), including design, materials, process, test and reliability.
• Establish and optimize Design of Experiments (DoE) frameworks to accelerate process development, yield learning, and performance optimization.
• Develop statistical models and apply rigorous data analysis to drive design decisions, process control, and yield improvement.
• Drive assembly process development, including novel flows for chiplet integration, substrate embedding, advanced interconnects and structure for reliability tests.
• Partner directly with hyperscalers, ASIC, GPU, and xPU customers to integrate power delivery chiplets into their platforms.
• Work closely with OSATs, testing, substrate vendors, and materials suppliers to build scalable, manufacturable solutions.

Advanced IC Packaging Engineer

Mechanical Engineer

• Drive thermal-mechanical co-design across chiplet, package substrate, cold plate, heatsink, and system-level integration.
• Collaborate with package design teams to optimize stack-up, warpage, stiffness, CTE management, and assembly robustness.
• Evaluate emerging cooling technologies including direct-to-chip liquid cooling, embedded cooling, vapor chamber integration, and advanced TIM solutions.
• Perform detailed thermal and thermo-mechanical simulations using industry-standard tools.
• Define integration strategies enabling customer adoption of novel thermal solutions into final package assembly flows.
• Collaborate with OSATs, substrate suppliers, thermal solution vendors, and manufacturing partners to enable scalable deployment.

Advanced IC Packaging Engineer

Lead Thermal Mechanical Engineer