Electronics Design and Analysis Engineer
Boeing
AssemblyCloudFlash
eCad Electrical Engineer – Level 4
Northrop Grumman
full-time
Posted on:
Origin: • 🇺🇸 United States • Virginia
Visit company websiteSalary
💰 $137,400 - $206,000 per year
Job Level
SeniorLead
Tech Stack
Assembly
About the role
- Own the end-to-end PCB layout process using Cadence Allegro PCB Designer
- Develop multilayer, high-density interconnect (HDI) and controlled impedance layouts optimized for space environments
- Create and maintain PCB symbols, footprints, and padstacks in accordance with internal library standards
- Work closely with electrical and mechanical engineer to ensure layout meets electrical, mechanical, and thermal constraints
- Implement high-speed routing techniques including differential pairs, length tuning, and EMI/EMC compliance practices
- Support RF and mixed-signal layout requirements, including controlled impedance and matched-length RF signal traces, proper isolation and grounding strategies, minimization of parasitic effects, and placement/routing for connectors, antennas, or filters
- Incorporate blind/buried vias, microvias, and stackup design for rigid/flex and complex assemblies
- Generate fabrication (Gerber, ODB++) and assembly files, release documentation, and participate in design reviews
- Apply NASA-STD-8739 and IPC-2221/2222 layout standards for space-rated hardware
- Participate in DFM/DFX reviews with manufacturing partners to ensure layout readiness for fabrication and assembly
- Collaborate with engineers to define layout constraints, clearance rules, and placement strategies
- Drive quality through internal peer reviews, ECAD checklist adherence, and continuous layout optimization
Requirements
- Bachelor’s degree in Electrical Engineering
- 9+ years of PCB layout experience
- Proven experience with Cadence Allegro PCB Designer in an aerospace, medical, or other high-reliability environment
- Experience with creating and managing ECAD libraries (symbols/footprints)
- Demonstrated expertise in multilayer board layout with signal integrity and power integrity in mind
- Demonstrated leadership in layout design for flight boards or mission-critical systems
- Experience with IPC CID or CID+ certification or equivalent layout training
- U.S. Citizenship
- Experience with NASA-STD-8739.x, IPC-6012, and ECSS standards (preferred)
- Experience with RF layout best practices (e.g., maintaining return path integrity, shielding, and connector placement) (preferred)
- Familiarity with designing for radiation environments and space qualification processes (preferred)
- Proficiency with constraint-driven design, stackup development, and controlled impedance routing (preferred)
- Experience with thermal/mechanical analysis coordination for layout decisions (preferred)
- Prior experience designing layouts for space-rated programs including DoD, NASA, or commercial LEO/GEO missions (preferred)
