Salary
💰 $160,000 - $210,000 per year
About the role
- Responsible for the full lifecycle of FPGA designs – design, simulation, implementation, testing, and verification – for digital logic for high-data-rate communications systems and precision line-of-sight tracking systems.
- Collaborate across teams to jointly develop high-speed digital signal processing and control system algorithms supporting wireless optical communications applications.
- Implement custom RTL modules that enable high data rate communications, as well as timing-sensitive feedback-based precision line-of-sight tracking systems.
- Develop test benches for RTL modules, perform simulation, and verify design requirements are met.
- Integrate third party IP cores into an FPGA system, create custom RTL wrappers for third party cores, and interface with IP vendors.
- Participate in board bring-up activities, system level integration tasks, troubleshooting, and field testing.
- Stay current with the latest FPGA technologies, tools, and best practices.
- Contribute ideas and participate in improving our design process, infrastructure, and products.
Requirements
- Bachelor of Science in Computer Engineering or similar discipline.
- 3+ years in FPGA/ Digital Logic Design role, with experience in implementing and testing custom RTL using System Verilog or Verilog.
- Experience with FPGA design flow including simulation, synthesis, and static timing analysis.
- Experience with FPGA high speed interfaces.
- Hands on experience with lab equipment including oscilloscopes and hardware debugging.
- Excellent problem-solving and analytical skills.
- Strong communication and teamwork skills.
- MS (or higher) in Computer Engineering, or a related field.
- Experience with AMD UltraScale/UltraScale+ FPGAs/SoCs, or equivalent.
- Experience coding in embedded C/C++ (or similar) and common scripting languages (e.g. Python, tcl).
- Experience implementing RTL blocks for high-speed communications, image processing, and real-time tracking systems.
- Experience with Simulink or High Level Synthesis.