Full-stack Engineer

• Work on both the physical design of complex chips and the methodology for efficient, robust design processes.
• Work hands-on to triage workflows, running RTL through synthesis and place and route (PnR) tools to create the physical view of the chip.
• Analyze performance by running timing analysis and verify power grid by performing EMIR analysis.
• Review completed runs for errors and create optimizations from successful runs; perform sign-off checks to verify database readiness.
• Collaborate with a global team on next-generation, high-performance processor chips targeted at server, 5G/6G, and networking applications.

Senior Engineer, Physical Design

Senior Software Engineer, Memory-Safe Languages

Software Architect – Advanced Development

Senior Software Engineer

Senior Software Engineer – Sensor, Identity Protection

Director, Software Architecture