Kepler Communications Inc.

FPGA Manager

Kepler Communications Inc.

full-time

Posted on:

Location Type: Hybrid

Location: Toronto • Canada

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About the role

  • Lead, mentor, and maintain a high-performing, geographically diverse FPGA team, fostering a collaborative culture that exemplifies Kepler’s Values
  • Ensure the team has the tools, training, and support needed to deliver high-quality RTL designs
  • Provide ongoing coaching, technical guidance, and career development through regular 1:1s and structured performance reviews
  • Monitor day-to-day execution across multiple projects, ensuring alignment with program goals and timelines
  • Support hiring plans, lead interviews, and onboard new team members
  • Own the FPGA development across the full lifecycle: architecture, design, verification, bring-up, debugging, and deployment
  • Partner with program and product leads to define scope, resourcing, and delivery milestones
  • Support vendor selection for tools and IP, and guide make/buy decisions
  • Own and drive adoption of the FPGA engineering design process, establishing and championing best practices for RTL design, simulation, verification, and CI/CD
  • Manage project timelines, resource allocation, and long-term technical strategy

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
  • 5+ years of experience in FPGA/RTL design and development
  • 3+ years of which were leading or managing engineering teams
  • Track record of building healthy team culture and driving performance through clear expectations and feedback
  • Strong communication skills and the ability to work cross-functionally
  • Proven ability to manage shifting priorities and drive execution through ambiguity via agile development practices
  • Proven ability to deliver complex hardware systems from concept to production
  • Proven ability to collaborate effectively with other teams both within and beyond the Engineering department
  • Strong technical fundamentals in FPGA/RTL design
  • Experience in SystemVerilog/Verilog or VHDL
  • Experience with FPGA toolchains (e.g., Vivado, Quartus, Libero)
  • Background in digital design fundamentals such as timing closure, high-speed interfaces (e.g., SERDES, PCIe, Ethernet), I/O planning, power management
  • Experience with simulation and verification methodologies (e.g., UVM, testbenches, formal verification) and tools (e.g. Questa, VUnit, ALint Pro, Verilator, Verible, GHDL, IcarusVerilog)
Benefits
  • Competitive compensation with a robust equity plan to share in our success.
  • Comprehensive coverage for health, dental, and vision insurance—including dependents.
  • Unlimited vacation, supportive parental leave policy, and company-wide holiday shutdown.
  • Semi-annual company-wide parties and frequent in-office team events.
  • Relocation packages available for approved roles.
  • $1,500 annual professional development fund to support your growth.
  • Fully stocked Toronto office kitchen with snacks, drinks, games and top-notch kitchen appliances.
  • Town Halls, Celebration Calls, and Company-wide events to stay connected and engaged.
  • We’re a certified Great Place to Work®, five years in a row!
Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools
FPGA designRTL designSystemVerilogVerilogVHDLdigital designsimulation methodologiesverification methodologiestiming closurehigh-speed interfaces
Soft Skills
leadershipmentoringcommunicationcollaborationperformance managementagile developmentteam culture buildingcross-functional teamworkcoachingresource allocation