Intel Corporation

Full-stack Engineer

• Develop new cross OS software that delivers Media and Video acceleration on Intel's graphics architecture
• Optimize performance and quality across the software stack
• Collaborate on cutting-edge technologies

GPU Software Development Engineer

• Build the hybrid AI collaboration layer connecting local AI and cloud AI.
• Design dynamic orchestration for planning, routing, and execution.
• Optimize AI workflows for latency, cost, privacy, and reliability.
• Enable agent-based systems with local planning and hybrid execution.
• Partner with product, systems, and runtime teams to ship production-ready platforms.
• Engage with industry-leading AI providers for co-engineering.
• Work with internal engineering teams and external partners, customers, and ISVs to deliver optimized AI solutions using Intel products.
• Research technical trends and utilize deep domain expertise to prototype solutions and develop AI software.
• Optimize performance of AI models through deep knowledge and expertise of AI frameworks, algorithms, models, and related hardware.
• Research, develop, and adjust new or existing AI models, code, parameters, and/or quantization to enhance hybrid performance.
• Serve as a trusted technical advisor and provide technical enabling.
• Partner with Intel software and hardware product development teams to accelerate and optimize future products in AI and HPC domains.

Senior GenAI Software Architect

Software Engineer

• Collaborate closely with Architecture, Development, and Validation teams to ensure firmware alignment with system requirements
• Plan, execute, and manage firmware integrations across internal and external teams
• Prepare, create, and maintain firmware releases for internal consumption and, when required, for external customers
• Develop, integrate, and sustain high-quality firmware for IPU platforms, emphasizing performance, stability, and scalability.
• Identify, debug, and resolve complex firmware and system-level issues across multiple environments.

Firmware Integrator, Developer

Mechanical Engineer

• Develop logic design and register transfer level (RTL) coding for CPU components, such as cell libraries, functional units, and CPU IP blocks.
• Participate actively in defining architecture and microarchitecture features to optimize CPU performance, power, and area.
• Write RTL and employ strategies to meet power, performance, area, and timing goals while ensuring design integrity and readiness for physical implementation.
• Review and refine verification plans and tests to ensure correct implementation of design features.
• Resolve failing RTL tests and implement corrective measures to meet design specifications.
• Document microarchitectural specifications (MAS) for CPU features and ensure their alignment with project goals.
• Support SoC customers to achieve seamless integration of the CPU block into larger designs.

RTL Design Engineer

Supply Chain

• Meeting customer service level goals and achieving forward-staged inventory reduction while maximizing volume flowing through all Regional Hubs/Boxing sites
• Support and interact with a range of stakeholders including Sales Operations, Business Unit Operations, Supply Chain and Planning Operations (SCPO), Logistics, and external Suppliers
• Support our Consignment, VMI hubs as well as Box CPU factories
• Building and maintaining relationships and respect with co-workers and managers within Corporate Supply and Planning Operations - Global Distribution Planning and across multiple partner organizations
• Utilizing data indicators in conjunction with collaboration discussions with our stakeholders to achieve customer service level and inventory goals
• Streamlining processes and driving problem resolution by utilizing Lean thinking, logic, and data analysis to create alternative solutions when needed
• Knowledge of strategic focus areas for stakeholders to influence supply decisions
• Understanding of business strategies and products to help drive accurate supply availability
• Escalating and communicating issues with recommendations and actions required
• Identifying and driving continuous improvement and strategic changes within the focus area and across the supply network
• Planning our replenishment activities to ensure excellent Tray and Box CPU supply for our customers
• Leveraging data analysis, knowledge of business strategies, and supply network infrastructure, you will influence forward-staging inventory strategies and resolution of cross-group supply issues

Supply Chain Analyst

• Develop logic design, register transfer level (RTL) coding, and implement DFT architectures including SCAN, MBIST, BSCAN, and TAP.
• Collaborate in the definition of architecture and microarchitecture features for DFT blocks and subsystems.
• Optimize logic to achieve power, performance, area, timing, test coverage, and defect per million (DPM) goals.
• Write and generate RTL and structural code for DFT integration, ensuring design integrity for physical implementation.
• Review and execute verification plans to ensure design features meet architecture specifications.
• Resolve RTL test failures and implement corrective measures to ensure feature correctness.
• Support SoC customers for successful integration of DFT blocks, contributing to high-quality IP and SoC designs.
• Develop high-volume manufacturing (HVM) test content for rapid bring-up and production deployment on automatic test equipment (ATE).
• Collaborate with post-silicon and manufacturing teams to verify features in silicon and support debugging requirements.

DFT Design Engineer

Manager

• Drives complex business transactions from deal conception and negotiations to contract closure.
• Contributes to business strategy development or other strategic projects as appropriate.
• Develops business relationships with third parties to understand the business and technical requirements.
• Works closely with internal development teams to guide direction business unit platform/product portfolios.
• Conducts industry and market research to make recommendations to the leadership team.
• Partners with crossfunctional teams to evaluate and drive strategic thinking on expansion opportunities.
• Identifies opportunities that support strategic priorities by interacting with senior business leaders, software companies, and organic pipeline generation.

Strategic Business Manager

Architect

• Develops and drives end-to-end CPU microarchitecture specifications for highly optimized CPU
• Evaluates feasibility tradeoffs, explores, and defines new approaches for CPU
• Models CPU performance and analyzes bottlenecks on workloads
• Collaborates with architects, design, verification, and validation engineers
• Participates in the debug and fixing of performance miscorrelation between RTL and silicon results

Senior CPU Performance Architect

Sales Operations Manager

• Lead cross-functional resolution of high visibility customer issues
• Manage strategic contract negotiations
• Ensure operational excellence across key Hyper-scaler accounts
• Oversee end-to-end supply chain operations
• Drive contract and pricing governance
• Engage in contract strategy and execution including compliance with Intel policies
• Partner with Account Sales management on negotiation strategy for supply positions

Sales Operations Analyst

Engineer

• Develop and sustain cutting edge mask processes
• Build correction models to improve mask CD uniformity
• Collect, analyze and present data to process engineers to drive continuous process improvements

Process Integration Development Engineer

• Design, develop, and debug ROM, bootloaders, and firmware across diverse hardware platforms
• Build and integrate firmware components into complete, bootable system images
• Implement and optimize low-level code for seamless hardware-software interaction
• Conduct thorough design reviews, testing, and validation to ensure robust firmware releases
• Debug and resolve complex boot, platform, and system-level issues
• Create comprehensive unit tests, integration tests, and supporting automation frameworks
• Develop across simulated environments, FPGAs, and physical hardware
• Partner with RTL and board design engineers to solve challenging cross-domain issues
• Provide guidance and mentorship to team members and stakeholders

Firmware Development Engineer

• design and develop shipping packaging solutions for wafer-level, component-level, and system-board products
• create new packaging designs and define requirements
• conduct qualification testing
• manage project timelines to meet startup schedules and cost targets
• lead pathfinding projects to advance packaging technology
• perform materials research on corrugated papers and cushions
• provide consultation on packaging improvements

Transport Media and Materials Engineer

• Collaborate with customers to understand technical requirements and provide innovative solutions.
• Lead pathfinding initiatives and complete technical readiness for cutting edge RAS technologies.
• Comprehend production use models as well as requirements for HVM all in the effort of higher quality.
• Analyze competitive solutions and define strategies to enhance Intel's offerings.
• Work with talented architects and designers across Intel to drive the RAS SoC/HW/SW/FW requirements and architectural definition, through documentation and eventual implementation.
• Support design engineering teams in product development phase and represent platform architecture issues exposed in design, validation, and test.
• Participate in industry-standard forums and represent Intel in discussions shaping future technologies.

Platform Reliability Architect – Availability, Serviceability

• Developing, designing and testing circuit blocks including wireline IO AFEs, clocking circuits, and voltage regulator circuits.
• Integrating them into Intel's leading technology test chips.
• Capturing design and measurement results to guide the next generation of process technology and circuit specifications based on requirements for SoC building blocks and critical wireline interfaces.
• Working closely with process and IP engineers to anticipate AMS IP requirements and use design and test results to inform and accelerate process technology and product development.

Analog and Mixed Signal Design Engineer

• Engage directly with major customers to understand their use cases, application architectures, and performance critical needs, translating these into actionable architecture and optimization strategies.
• Influence and define technical direction across Intel and the industry as a recognized domain expert, acting as a change agent and role model for Intel values.
• Lead the architecture and optimization of customer workloads across cloud, on premise, and hyperscale environments, leveraging Intel platform software, industry software, compilers, tools, libraries, and frameworks.
• Mentor and develop junior technical leaders, grow the technical community, and align organizational goals with a cohesive technical vision.
• Identify and define opportunities for future architecture optimizations, including NUMA, cache awareness, branch prediction, and other advancements tailored for next generation Intel platforms.
• Help drive Intel's participation and leadership in opensource communities (e.g., Spark, Postgres, MySQL, Go, zstd) and identify areas where deeper engagement will strengthen the ecosystem.