Post-silicon Validation and Debug Engineer
Intel Corporation
full-time
Posted on:
Location Type: Office
Location: Hillsboro • California • Oregon • United States
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Salary
💰 $105,650 - $149,150 per year
Job Level
About the role
- Perform low-level and complex debug across multiple systems, subsystems, or SoC levels for Intel products.
- Develop validation plans and execute tests for multiple domain- and system-level features/flows in the SoC.
- Develop and implement techniques for faster SoC and platform-level debug while isolating failing system components.
- Utilize design-for-debug (DFD) tools and scripts to continuously improve debug discipline.
- Conduct root cause analysis, resolve triage failures and marginality issues, and track SoC debug progress.
- Collaborate with design, system validation teams, and high-volume manufacturing factories to characterize new device features and functionalities.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
- 0-1+ years of experience with a Bachelor's degree or 0 years with a Master's degree in SoC design and debug or equivalent experience.
- Proficiency in SoC design, architecture, and debug techniques, including DFD tools and methodologies.
- Strong understanding of firmware and software integration in hardware systems.
- Ability to apply debug workflows using advanced test methodologies and failure isolation techniques.
Benefits
- competitive pay
- stock bonuses
- health
- retirement
- vacation
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
SoC designdebug techniquesfirmware integrationsoftware integrationfailure isolation techniquestest methodologiesroot cause analysisvalidation plansdebug workflowsdesign-for-debug
Soft Skills
collaborationproblem-solvingcommunication
Certifications
Bachelor's degree in Electrical EngineeringBachelor's degree in Computer EngineeringMaster's degree in related field