Expert Executive Recruiters (EER Global)

Engineer

• Develop and execute verification plans based on architecture and RTL specifications.
• Build, extend, and maintain UVM‑based verification environments, including agents, drivers, sequencers, monitors, scoreboards, and checkers.
• Implement constrained‑random and coverage‑driven verification methodologies.
• Debug complex hardware and hardware/software interactions using industry‑standard tools.
• Collaborate with RTL designers, architects, and validation teams to identify issues and drive them to closure.
• Analyze functional coverage, identify gaps, and ensure verification completeness.
• Participate in subsystem and SoC‑level integration and verification activities.

VLSI Verification Engineer