Aalyria

Engineer

• Build and maintain high-fidelity system models within Spacetime to orchestrate dynamic wireless communication networks
• Design and write production-ready "adapter layers" (primarily in Python or Go) to connect Spacetime with customer hardware
• Create and optimize data schemas (using Protobuf, JSON, gRPC) to map complex external network topologies
• Perform wireless communication system link budget analyses, wave propagation modeling, and coverage simulations
• Act as the tier-3 escalation lead for live networks, diagnosing and resolving complex system integration issues
• Work closely with the core Product and Software Engineering teams to translate custom integration patterns into reusable product features

Mission Engineer

Solutions Engineer

• Collaborate with customers to understand their specific requirements and desired outcomes
• Gather information such as the motion of mobile terminals, ephemerides of satellites, antenna radiation patterns, RF channels and bandwidths, C/N+I thresholds, ground segment network topology, Layer 2 and Layer 3 protocols, ground station coordinates, SLAs, and more
• Translate customer-provided information into the appropriate fields within Spacetime's open APIs (based on gRPC and protocol buffers) writing code to automate the steps in any of Golang, Java, C++, or Python.
• Perform the necessary configuration work within Spacetime to initialize the customer's instance, if required
• Work closely with the engineering and customer success teams to address any technical challenges or requirements during the onboarding process
• Provide technical support and guidance to customers during the evaluation phase, ensuring a smooth transition into using Spacetime
• Document and communicate customer-specific configurations and requirements to internal teams

Solutions Engineer, Spacetime Onboarding

Security Engineer

• You'll be the technical voice of product security across Aalyria, reporting to the Director of Security & IT.
• You'll own application security, CI/CD and supply-chain security, our Kubernetes-based product infrastructure, product-side authentication and PKI.
• You'll partner closely with hardware engineering on Tightbeam.
• Application & software security. SAST/DAST/SCA, secure SDLC, threat modeling, and software vulnerability management across our codebase.
• CI/CD and supply-chain security. Hardening our GitLab pipelines, build provenance, dependency integrity, signing, and SLSA-aligned controls.
• Product infrastructure security. GKE and Kubernetes hardening, container security, workload identity, network policy, and runtime protection.
• Product PKI. Certificate lifecycle, issuance, rotation, and mTLS architecture across distributed services and remote assets.
• Vulnerability management. Triage, prioritization, remediation tracking, and exception handling, for both disclosed upstream issues and internal findings.
• Product incident response. Leading triage and response for product-side security incidents, coordinating with corporate IR, and driving post-mortems to action.
• Product infra hardening. Baseline configurations, secure defaults, and compensating controls across product environments.
• Hardware security partnership. Working with the Tightbeam team on firmware security, secure boot, key storage, and hardware supply-chain integrity.

Lead Product Security Engineer

Mechanical Engineer

• Deliver end-to-end FPGA Modem Solution based on VHDL or System Verilog
• Lead the micro-architecture and RTL development for key digital signal processing (DSP) blocks in the coherent modem, including equalization, carrier recovery, and timing recovery
• Oversee the integration of Forward Error Correction (FEC) engines and high-speed interfaces into the overall modem architecture
• Collaborate with system architects and DSP algorithm developers to translate DSP algorithm specification/models into robust RTL designs
• Design fixed-point arithmetic RTL implementation of complex DSP blocks
• Ensure the design is compliant with relevant industry or company standards and specifications
• Apply low power design techniques and perform power, performance, and area (PPA) analysis
• Verify intended functionality using thorough test benches, and via vector matching with system models
• Support functional verification, debug, and static timing closure
• Collaborate closely with firmware/software engineers to define hardware/software partitioning, define registers and interfaces, and support system-level integration and debug
• Support silicon bring-up and bench testing

Lead RTL/FPGA Design Engineer

Communications

• Design, develop, and optimize coherent DSP algorithms for high-speed communication systems
• Architect end-to-end modem DSP chains including equalization, timing recovery, carrier recovery, and FEC integration.
• Perform system-level modeling, simulation, and performance analysis, including link budgets and channel impairments.
• Develop advanced algorithms such as Adaptive equalization, Timing and carrier synchronization loops, Impairment mitigation.
• Evaluate and model optical and electrical channels, including optical components, ADC/DAC, AFE, and mixed-signal impairments.
• Define DSP architecture specifications for ASIC/FPGA implementation, ensuring efficient mapping to hardware.
• Collaborate with hardware and firmware teams to integrate DSP algorithms into modem designs.
• Support lab bring-up, validation, and characterization of modem systems.
• Analyze relevant industry standards (e.g., OIF, Ethernet, optical transport) and incorporate them into designs.

Communications DSP Engineer

Field Engineer

• Lead technical onboarding for new customers: discovery, environment mapping, integration plans, and “day-1” working connectivity.
• Design and implement custom integrations/adapters that connect customer and partner hardware/software to Spacetime.
• Own end-to-end proofs-of-integration and field demos: lab bring-up, on-site troubleshooting, performance validation, and operator-ready runbooks.
• Debug complex issues across software, networks, and hardware interfaces in constrained, real-world environments.
• Partner with Core Engineering to productize repeatable integration patterns into reusable frameworks, SDKs, schemas, and deployment templates.
• Create crisp technical artifacts: integration specs, gRPC/protobuf APIs, deployment guides, and reference architectures.
• Provide technical leadership during early operations: serve as an escalation point and coordinate incident response during critical milestones.

Mission Engineer

Solutions Engineer, Spacetime Onboarding

Lead Product Security Engineer

Lead RTL/FPGA Design Engineer

Communications DSP Engineer

Field Solutions Engineer