Ursa Major Event Management & Consultancy

Engineer

• Architect and generate ASIC/FPGA test benches
• Generate test cases and run simulations to verify the functionality of ASIC/FPGA code
• Generate and perform testing on target hardware as part of post-silicon validation or integrated test environment (Hardware in the Loop)
• Collect functional and code coverage metrics
• Validate and verify ASIC/FPGA requirements
• Help debug ASIC/FPGA design and/or test issues
• Prepare materials for peer reviews and major program design reviews

FPGA Verification Engineer