TYLsemi

Mechanical Engineer

• Design voltage regulators, including high-efficiency power stages, error amplifiers, current sensing, adaptive load-line circuits, fast transient compensation, protection, and telemetry
• Model mixed-signal subsystems, including regulator control loops, power delivery networks, and DVFS subsystems, to guide architecture and design trade-offs
• Lead collaboration with SIPI/PI and packaging teams to co-optimize voltage regulators and power delivery
• Validate analog blocks across PVT, mismatch, and post-layout effects
• Conduct clear design reviews covering requirements, trade-offs, and risks
• Support silicon bring-up through correlation, structured debug, and decisive fixes
• Coordinate with layout, verification, test, and validation teams through clear interfaces and documentation
• Develop reusable design collateral and improve methodologies to reduce cycle time and increase first-pass success

Analog Design Engineer

Designer

• Develop and execute verification test plans for IPs, subsystems, and SoC components
• Create and maintain SystemVerilog/UVM-based verification environments
• Write directed and constrained-random test cases to validate design functionality
• Develop functional coverage models and assist in coverage closure activities
• Debug simulation failures and collaborate with design engineers to resolve issues
• Write assertions (SVA) to improve design checking and verification quality
• Participate in regression execution, result analysis, and reporting
• Support IP integration and subsystem-level verification activities
• Learn and apply industry-standard verification methodologies and best practices
• Contribute to automation scripts for regression, reporting, and verification productivity
• Work closely with Design, Architecture, and Software teams to understand requirements and verify functionality

Design Verification Engineer

Architect

• Own the IVR architecture end-to-end
• Define the architecture, validate the tradeoffs, and drive execution through tape-out
• Define IVR architecture and digital control engine requirements
• Establish power domain architecture for multi-domain compute targets
• Oversee integrated inductor evaluation and selection
• Guide process node selection for generations
• Translate AI compute platform power delivery requirements into product specifications
• Define the multi-generation architecture roadmap

Analog Design Engineer

Design Verification Engineer

PMIC Architect