Staff ASIC Design Layout Engineer
TTM Technologies
full-time
Posted on:
Location Type: Remote
Location: California • United States
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Job Level
About the role
- Overseeing definition, design verification, and layout documentation for ASIC development.
- Determines layout architecture design, analog layout requirements and Place and Route digital layout requirements for new/ongoing ASIC developments.
- Defines top down layout requirements.
- Significant experience leading the IC layout development of multidimensional designs involving the layout of complex integrated circuits, entire active devices, components, sub components and entire subsystems.
- Utilizes system tools (such as Cadence Virtuoso) for layout, layout verification and place and route.
- Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use.
- Writes the semiconductor specification for an ASIC and performs lab verifications.
- Supports top level layout planning and final layout verification, including experience with release to manufacture (tape-out) procedures.
- IC layout responsibilities associated with new product development or internal R&D efforts. These include process selection, die size calculations, layers requirements and process options.
- Individual works in a multi-disciplinary team environment and is required to participate in proposal efforts and technical reviews.
Requirements
- 10yrs. Minimum of IC Physical Design Experience
- BS or related degree in engineering or a related discipline
Benefits
- TTM offers a variety of health and well-being benefit programs.
- Benefit options include medical, dental, vision, 401K, Flexible Spending Account, Health Savings Account, accident benefits, life insurance, disability benefits, paid vacation & holidays.
- Benefits are available 1st of the month following date of hire.
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
ASIC developmentlayout architecture designanalog layoutPlace and Routelayout verificationtiming analysispower analysissemiconductor specification writingdie size calculationsprocess selection
Soft Skills
leadershipteam collaborationproposal developmenttechnical review participation