quadric.io

Engineer

• Convert 2–3 active customer evaluations into committed design wins by getting customer workloads running at target latency and accuracy on Chimera.
• Port customer workloads onto Chimera — architect, adapt, profile, and write custom kernels when required.
• Work on-site and remotely with customer engineering teams: debug failures, hit benchmark targets, and guide model-architecture tradeoffs.
• Drive evaluations forward end-to-end, from first technical conversation through design win.
• Codify what you learn into reusable assets — SDK skills, porting playbooks, and agentic content — so each subsequent engagement moves faster than the last.
• Build applications and benchmark collateral that support future customer engagements.
• Partner with engineering and product teams to relay customer learnings and shape the roadmap.
• Contribute skills and playbooks to Quadric's growing agentic FDE toolset.

Forward Deployed Engineer

Chief Marketing Officer

• Develop Quadric's overall marketing strategy and annual roadmap.
• Build and lead the marketing team while managing agencies and external partners.
• Establish the processes, budget, metrics, and operating rhythm for the function.
• Own Quadric's messaging, positioning, and brand identity.
• Translate complex hardware and AI technologies into compelling stories for both technical and executive audiences.
• Lead thought leadership through blogs, white papers, case studies, videos, and executive communications.
• Partner with Product, Engineering, Business Development, and the executive team on product launches and GTM strategy.
• Create competitive positioning and sales enablement materials.
• Support major product launches and ecosystem partnerships.
• Manage PR, analyst relations, and media engagement.
• Oversee Quadric's presence at industry conferences and events.
• Support executive messaging, keynote presentations, and investor-facing communications.

Head of Marketing

Product Manager

• Hardware roadmap. Translate customer requirements, competitive pressure, and architectural constraints into a track-by-track feature list with explicit gating — what ships, what slips, what gets cut.
• Architecture freeze. Build the case for contested architecture decisions (e.g., dedicated requant unit vs. wider MAC array), run the tradeoff with the architects, and bring a recommendation to the PSC.
• Customer engagement. Named hardware product owner for anchor accounts. Present new features, ingest formal architecture feedback, and convert it into roadmap input.
• IP usability. Find what customers are silently working around — API wrappers, glue logic, custom RTL hooks, workaround scripts.
• Hardware competitive intelligence. Track Synopsys NPX6, Arm Ethos-U85, Ceva NeuPro-M, VeriSilicon Vivante, and NVIDIA Jetson at the architectural level. Translate competitor moves into specific feature requirements before gaps appear in customer evals.
• SoC integration positioning. Decide which integration knobs (AXI4/ACE-Lite, CoreSight, power-domain partitioning, performance counters) are exposed, which are productized, and how they're described in the integration guide.
• Functional safety positioning. Sequence FMEDA work, lockstep configurations, and safety-island architecture.

Forward Deployed Engineer

Head of Marketing

Senior Product Manager, Hardware – NPU IP