The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm.
Requirements
10+ years experience in high performance analog layout in advance Finfet/CMOS process nodes
Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example)
Should be able to lead the project
Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology
Familiarity in various physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
Layout Automation using SKILL/PERL/Python is a plus
Self starter with the ability to define and adhere to schedule and methodology
Must possess strong social skill and be an excellent team mate
Benefits
We offer excellent compensation
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
analog layoutmixed-signal layoutCMOS data convertersFinfet process nodeshigh speed analog blocksADCDACPLLSERDESlayout automation