NVIDIA

Engineer

• Focuses on research and development of techniques to accelerate leading applications in telecom, low-latency signal processing, high performance computing, scientific computing, data analytics, and AI
• Perform in-depth analysis and optimization for performance on CPU, GPU, and network architectures
• Guide key application developers and contribute to applications
• Develop reference codes or libraries
• Create and optimize core parallel algorithms and data structures
• Collaborate with diverse groups at NVIDIA to improve the platform

Compute DevTech Engineer

Graphics Designer

• Verification of the digital design, golden models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM
• Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology
• Responsible for understanding the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design
• Write and execute test plan and thoroughly verify a design in a product shipment focused / compressed schedule
• Work with architects, designers, and pre and post silicon verification teams to accomplish your tasks

Senior Digital Design Verification Engineer – Hardware

Director

• Develop and execute proactive technology policy strategies to monitor, analyze, and anticipate regulatory developments related to AI, cybersecurity, data governance, open source, cloud computing, and energy‑efficiency standards in China.
• Build and maintain strong relationships with key external stakeholders, including: Central and local government agencies in Beijing, Standards‑setting organizations and technical committees, Leading policy research institutes and academic institutions, Industry alliances, associations, and developer communities.
• Represent NVIDIA in policy dialogues, technical workshops, standards meetings, and industry forums, advocating for innovation‑friendly policies, interoperability, and responsible AI development.
• Track political and regulatory developments affecting AI, digital infrastructure, and cloud computing; assess potential business impact; and provide timely insights and recommendations to senior leadership in China and at headquarters.
• Collaborate closely with cross‑functional teams—including Legal, Compliance, Engineering, Product, Business Units, and Industry Relations—to align government affairs initiatives with NVIDIA’s product roadmap and technology strategy.
• Prepare high‑quality advocacy materials, including technical briefings, policy position papers, standards proposals, and regulatory submissions, tailored for policymakers and technical audiences.
• Support and shape NVIDIA’s China technology policy strategy, strengthening the company’s reputation and credibility across government and technical communities.
• Conduct in‑depth research and analysis on policy trends, competitor activities, and industry developments to identify risks and opportunities.
• Manage and coordinate external consultants, policy advisors, and industry coalitions supporting NVIDIA’s engagement in China.
• Provide guidance and mentorship to junior team members, particularly on technical policy and standards‑related engagement.

Director, Government Affairs – China

Full-stack Engineer

• Extend and maintain hardware abstraction layers and core system libraries used across the platform.
• Design and implement drivers, runtimes, and data movement/aggregation pipelines supporting workload execution.
• Build and maintain runtime interfaces for launching, monitoring, and managing workloads.
• Improve platform reliability through automation, error reporting, diagnostics, and operational tooling.
• Debug and resolve complex sequencing, initialization, and runtime issues across multi-component systems.
• Partner cross-functionally with hardware engineering, compiler teams, and data center operations to bring features from prototype to production.
• Support new platform bring-up and NPI (New Product Introduction) efforts for new boards and silicon.
• Contribute to engineering excellence through documentation, tooling improvements, code reviews, and knowledge sharing.

Senior Systems Software Engineer

Account Manager

• Building a positive relationship with key Supercomputing customers
• Leading NVIDIA activities with all Universities and Research Institutes in Higher Education and Research
• Understand the mechanisms and interworking peculiarities of the national/ HPC and tertiary education and scientific research markets
• Segment and size markets while prioritizing them for adoption rate and impact
• Own strategic accounts to develop the market: proof of concepts, roadmap reviews, technology solution build
• Continuously look for opportunities to showcase customer success by working with marketing to package up success stories, participate in launches and events
• Resolve if the customer has a valid business need for NVIDIA Products and Professional Services and recommend marketing strategies
• Build and strengthen your business relationship with existing accounts; follow-up to ensure all of their post-sales needs are being met
• Provide, or facilitate training opportunities for your accounts

Supercomputing Account Manager

Architect

• Modeling of GPU architecture, baseboard components and other features
• Work in a matrixed environment, across the different modeling teams, to document, design, develop tools to analyze and simulate, validate and verify models
• Familiarize with different functional and performance simulation models across Nvidia and work through modeling features
• Develop tests, test plans and testing infrastructure for new architectures/ features
• Guide the improvement of the simulation platform and expand other resources to support future GPU architectures
• Develop or use AI to help with day-to-day tasks

Senior GPU Functional Modeling Architect

• Design and develop new scheduling features and add-on services to improve GPU compute clusters across many dimensions, such as resource usage fairness, GPU occupancy, GPU waste, application resilience, application performance and power usage.
• Design and develop batch workload management and orchestration services
• Provide support to staff and end users to resolve batch scheduler issues
• Build and improve our ecosystem around GPU-accelerated computing
• Performance analysis and optimizations of deep learning workflows
• Develop large scale automation solutions
• Root cause analysis and suggest corrective action for problems large and small scales
• Finding and fixing problems before they occur

Senior GPU Scheduler Engineer

Frontend Engineer

• Design and implement enhancements to the CUDA C++ compiler driver and front-end, ensuring tight integration with industry-leading third-party compiler software
• Contribute to the CUDA C++ programming language specification and its evolution factoring in support for new GPU hardware capabilities
• Drive language conformance, front-end robustness, and compile-time improvements that benefit a wide range of users, from deep learning researchers to safety-critical software developers
• Provide engineering support for the compiler and deliver targeted changes for production customer releases
• Establish strong customer/partner relationships and trust through excellent execution and high-quality software development

Senior Compiler Engineer – Compute Front-End

• Design and develop innovative AI-driven web products to solve big data challenges in chip design
• Build high performance API's, data pipelines and backend services in a distributed systems environment
• Own technical strategy for broad and complex challenges
• Collaborate closely with product and engineering teams to translate high-level requirements into actionable deliverables
• Handle multiple tasks and adapt to changing priorities
• Be an engineering generalist

Senior Software Engineer, AI Web Products

AI Engineer

• Research and develop techniques to GPU-accelerate high-performance workloads at the intersection of AI and financial markets
• Work directly with other technical experts in their fields (industry and academia) to perform in-depth analysis and optimization of complex AI and HPC workloads to ensure the best possible performance on modern CPU and GPU architectures
• Publish and present discovered optimization techniques in developer blogs or relevant conferences to engage and educate the Developer community
• Influence the design of next-generation hardware architectures, software, and programming models in collaboration with research, hardware, system software, libraries, and tools teams at NVIDIA

AI Developer – Financial Sector, New College Grad

• Be responsible for creation of "state of the art" UVM based verification test benches and methodologies to verify complex IP's and Sub-systems.
• Work on System level verification using C/C++.
• Architect the testbenches and craft verification environment using UVM methodology.
• Define test plans, tests and verification infrastructure for modules, clusters and system.
• Build efficient and reusable bus functional models, monitors, checkers and scoreboards.
• Implement functional coverage and own verification closure.
• Work with architects, designers, FPGA and post-silicon teams to ensure that your unit is robust.

Verification Engineer – Hardware

Senior Verification Engineer – Hardware

Mechanical Engineer

• Responsible for implementing BOOT, functional safety and power management architecture
• Make architectural trade-offs based on feature/performance/power requirements
• Analyze system implications, implement RTL, drive verification
• Close timing and support silicon validation

ASIC Design Engineer, Functional Safety, Power Management

• Be responsible for making architectural trade-offs based on feature/performance/power requirements
• Analyze system implications, come up with the micro-architecture, implement RTL, drive the verification, close timing, and support silicon validation
• Own micro-architecture and RTL development of design modules
• Micro-architect features to meet performance, power and area requirements
• Work with HW architects to define critical features
• Work with verification teams to verify the correctness of implemented features
• Partner with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.

ASIC Design Engineer, High Speed IO

• Design, develop, and operate distributed systems that manage data, compute, and networking for large-scale AI workloads.
• Build software and automation to orchestrate workloads across thousands of GPUs and petabytes of storage in multi-region clusters.
• Collaborate with AI/ML research teams to understand their requirements and translate them into scalable, high-performance solutions.
• Drive improvements in system reliability, performance, and observability to meet exascale standards.
• Partner with security, networking, and platform teams to ensure that MARS infrastructure meets the highest standards of robustness and compliance.
• Participate in design reviews, contribute to system architecture discussions, and influence the evolution of NVIDIA’s AI infrastructure stack.
• Stay current with advances in distributed systems, large-scale computing, and AI frameworks to help shape the future direction of MARS.