Senior Microarchitecture Design Engineer
Quantum Machines
Job Level
Mid-LevelSenior
About the role
- Physical design of blocks according to specifications targeting optimal power, area, and performance
- Work on a variety of challenging designs including high cell count and high-speed blocks
- Resolve complex timing and congestion problems
- Perform all aspects of physical design chip development (RTL2GDS): synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, physical verification
- Participate in flows development and collaborate within the Networking Silicon engineering team to deliver high-throughput, low-latency communication devices
Requirements
- B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience
- Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
- Deep understanding of all aspects of Physical construction and Integration
- Knowledge in Physical Design Verification methodology LVS/DRC
- Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)
- Great teammate; creative and autonomous engineer
