Developing physical design methodologies for implementation of graphics processors and SOCs.
Key responsibility includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips.
Participate in developing flow and tool methodologies for chip floorplan, power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

Requirements

MS in Electrical or Computer Engineering (or equivalent experience)
Minimum 5 years experience in Physical Design Engineering
Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route, Integration and Verification.
Strong background with hierarchical design approach, top-down design, budgeting, timing and physical convergence.
Familiar with various process related design issues including Design for Yield and Manufacturability, EM and IR closure and thermal management.
Expertise and in-depth knowledge of industry standard EDA tools.
Proficiency in programming and scripting languages, such as, Perl, Python, and C++.

Benefits

equity
benefits 📊 Check your resume score for this job Improve your chances of getting an interview by checking your resume score before you apply. Check Resume Score

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools

Physical Design EngineeringChip DesignFloor PlanningClock DistributionPower DistributionPlace and RouteIntegrationVerificationDesign for YieldProgramming

Soft Skills

Creative SolutionsProblem SolvingCollaboration

Certifications

MS in Electrical EngineeringMS in Computer Engineering