Marvell Technology

Senior Principal Engineer – RTL Design

Marvell Technology

full-time

Posted on:

Location Type: Office

Location: PuneIndia

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Job Level

Tech Stack

About the role

  • Define the sub system architecture, micro-architecture and register specification for highly complex SoCs
  • Drive and participate in specification writeup
  • Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers
  • Implement a specification using RTL coding techniques and best practices
  • Work with third party vendors to define customization requirements of third party IPs
  • Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff
  • Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug
  • Help develop and/or evaluate design and verification methodologies and participate in improving existing ones
  • Collaborate with and provide guidance to the post silicon and software teams for silicon bring up and performance tuning
  • Provide mentorship to the more junior team members

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 20+ years of related professional experience
  • Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 18+ years of experience
  • Experience in creating architectural, micro-architectural, and register specifications
  • Verilog/System Verilog RTL coding with System Verilog assertions
  • Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation, prototype bring-up)
  • Has worked on complex IP or ARM or RISC V based Processor Subsystem Design
  • Understanding on Caliptra and Hardware Security Standards is required
  • Expertise in any of the following domains would be a big plus: networking, embedded systems architecture, computer architecture, machine learning accelerators
  • Experience with scripting in Perl/Python/Shell
Benefits
  • competitive compensation
  • great benefits
  • workstyle within an environment of shared collaboration
  • transparency and inclusivity
  • tools and resources for success
Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools
RTL codingVerilogSystem VerilogSystem Verilog assertionsASIC design flowperformance analysispower analysissynthesistiming signoffscripting in Perl
Soft Skills
mentorshipcollaborationguidancecommunicationcross-functional teamwork
Certifications
Bachelor’s degree in Computer ScienceBachelor’s degree in Electrical EngineeringMaster’s degree in Computer ScienceMaster’s degree in Electrical EngineeringPhD in Computer SciencePhD in Electrical Engineering