Processor and Embedded Systems Engineer Intern
Cirrus Logic
AssemblyPerlPython
SoC Design Verification Engineer
Intel Corporation
full-time
Posted on:
Location Type: Office
Location: Santa Clara • California, Oregon, Texas • 🇺🇸 United States
Visit company websiteSalary
💰 $121,050 - $227,620 per year
Job Level
Mid-LevelSenior
Tech Stack
PerlPython
About the role
- Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
- Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm microarchitecture specifications.
- Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
- Replicates, root causes, and debugs issues in the precision environment.
- Finds and implements corrective measures to resolve failing tests.
- Collaborates and communicates with SoC architects, micro architects, full chip architects, RTL developers, post silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
- Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
- Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
- Maintains and improves existing functional verification infrastructure and methodology.
- Coordinating and steering the efforts of multiple teams and team members.
Requirements
- Bachelor's degree in Electrical/Computer Engineering or Computer Science and 3+ years of relevant experience OR Master's degree in Electrical/Computer Engineering or Computer Science and 2+ years of relevant experience OR PhD in Electrical/Computer Engineering or Computer Science
- Experience in RTL Design validation experience developing unit or system level test-benches and test plan creation
- Experience in Developing test-bench components such as monitors, scoreboard/checkers, and bus functional models (BFMs)
- Experience in System Verilog Assertions and Functional Coverage
- Experience in HDL such as Verilog and UVM/System Verilog
- Experience in Scripting languages such as Perl/Python
- Experience with working IP and SoC Verification teams and developing solutions spanning both requirements
- Experience with Embedded Software/Firmware (C/C++)
- Familiarity with hardware design flows (EDA) and tools: CDC, Lint, Synthesis, Logic Equivalence Checking, Timing
- Experience with Developing/validating CPU flows such as Reset, Power Management, and Boot flows
Benefits
- competitive pay
- stock
- bonuses
- health
- retirement
- vacation
- Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
ATS Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
SoC verificationtest benchesemulation modelssystem simulationdebuggingSystem Verilog AssertionsHDLUVM/System Verilogscripting languagesEmbedded Software
Soft skills
collaborationcommunicationtechnical reviewsproblem-solvingteam coordination
