Intel Corporation

CPU Physical Design Engineer

Intel Corporation

full-time

Posted on:

Location Type: Office

Location: AustinOregonTexasUnited States

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Salary

💰 $141,910 - $269,100 per year

Job Level

Tech Stack

About the role

  • Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.
  • Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
  • Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.
  • Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.
  • Works intimately with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low-power synthesizable CPU.
  • Optimizes CPU design to improve product level parameters such as power, frequency, and area.
  • Participates in the development and improvement of physical design methodologies and flow automation.

Requirements

  • Bachelors’ degree in Computer/Electrical Engineering or related field with 8+ years of relevant experience -OR- Master Degree in Computer/Electrical Engineering or related field 6+ years of relevant experience - OR- PhD Degree in Computer/Electrical Engineering or related field 5+ years of relevant experience
  • Must have experience in some or most of the following: Synthesis, Placement (PnR), Routing, CTS (clocks), Post-Route Optimization, Verification and Sign-off, PrimeTime, Timing ECOs
  • Strongly prefer individuals who have gone through multiple Tape-in Cycles and contribute as a senior member of the team.
  • Experience in physical design EDA tools, Perl and Tcl Programming, Low power and high performance design principals, familiarity with Verilog and CPU architecture.
Benefits
  • competitive pay
  • stock bonuses
  • health
  • retirement
  • vacation
Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools
physical design implementationsynthesisplace and routeclock tree synthesisstatic timing analysispower distributionreliability verificationDFTlow power designhigh performance design
Soft Skills
collaborationrecommendation analysisteam contribution