Innatera

Mechanical Engineer

• Architect, design, and implement digital IP blocks and subsystems for our neuromorphic SoCs;
• Translate high-level product and algorithmic requirements into RTL-level specifications and microarchitectures;
• Own all front-end design activities including RTL coding (SystemVerilog/Verilog), simulation, synthesis, STA, and design documentation;
• Collaborate with the verification team to review test plans and co-develop functional testbenches;
• Draft timing constraints and interface closely with backend engineers during physical design and gate-level simulation;
• Integrate third-party IP and contribute to SoC-level architecture and bring-up;
• Apply low-power design techniques and optimize for PPA;
• Work with cross-functional teams including algorithm, platform/firmware, applications, and analog design;
• Mentor more junior engineers, contribute to code reviews, and elevate overall team's expertise.

Staff Digital Design Engineer

Engineer

• To take care of the full life-cycle of our SDK features in one of the components, including the simulator and compiler, or the API and the infrastructure of our SDK;
• Set and uphold high standards for code quality, maintainability, testing, and release readiness;
• Conduct code reviews and improve engineering practices and ensure robust documentation within the expertise domain;
• Work closely with other team (Digital Design, Firmware, Applications), translate complex algorithm or hardware specifications into efficient, user friendly, and testable software behaviour, and provide technical feedback;
• Provide support to internal teams and customers to enable them to develop applications quickly using our SDK or help solve any issues;
• Contribute to improving power consumption performance, latency, and any performance bottlenecks for our efficient edge-AI solution;
• Keep innovating, bring latest trend of the technology and best practice to keep our product competitive in the market.

Senior NPU SDK Engineer

• Design and implement simulation models in modern C++ (C++17/20) to replicate the functions of neuromorphic processors, CPUs, memory systems, and other components in the full SoC;
• Convert technical hardware specs into high-performance, verifiable software models;
• Contribute to performance modeling: simulate power consumption, latency to identify performance bottlenecks;
• Work closely with cross-functional teams (Digital Design, Firmware, SDK) to ensure models reflect the real hardware faithfully;
• Collaborate on expanding our SDK feature set, ensuring the usability of the simulation for external developers.
• Participate in team brainstorming and contribute to other SDK development tasks as needed.

Staff Digital Design Engineer

Senior NPU SDK Engineer

Senior SDK Software Tools Engineer