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About the role
Key responsibilities & impact- Architect, design, and implement digital IP blocks and subsystems for our neuromorphic SoCs;
- Translate high-level product and algorithmic requirements into RTL-level specifications and microarchitectures;
- Own all front-end design activities including RTL coding (SystemVerilog/Verilog), simulation, synthesis, STA, and design documentation;
- Collaborate with the verification team to review test plans and co-develop functional testbenches;
- Draft timing constraints and interface closely with backend engineers during physical design and gate-level simulation;
- Integrate third-party IP and contribute to SoC-level architecture and bring-up;
- Apply low-power design techniques and optimize for PPA;
- Work with cross-functional teams including algorithm, platform/firmware, applications, and analog design;
- Mentor more junior engineers, contribute to code reviews, and elevate overall team's expertise.
Requirements
What you’ll need- 7+ years of hands-on experience in ASIC digital design, with a focus on complex IP blocks and SoC-level integration
- Strong RTL design and debugging skills in SystemVerilog/Verilog
- Deep understanding of SoC architecture, memory-mapped bus interfaces, and IP integration flows
- Experience with Cadence tools and EDA flows
- Proven ability to define PPA goals, perform synthesis and static timing analysis
- Familiarity with DFT, gate-level simulations, and low-power design methodologies
- Comfortable with drafting specifications, design documents, and reviewing hardware/software integration requirements
- Have exposure to functional verification and writing or reviewing testbenches.
Benefits
Comp & perks- A dynamic working environment around a fearless engineering culture
- Ambitious teams with the freedom to innovate
- A Flexible working environment (work from home policy, flexible working hours, advantageous holidays scheme ..)
- An inclusive company culture which embraces communication, diversity and support around holistic and personal development
ATS Keywords
✓ Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills & Tools
SystemVerilogVerilogRTL designsynthesisstatic timing analysislow-power design techniquesDFTgate-level simulationsfunctional verificationtestbenches
Soft Skills
mentoringcollaborationcode reviewscommunication