d-Matrix

Supply Chain

• Gain hands-on experience supporting North America logistics and inventory management
• Support day-to-day logistics operations including inbound and outbound shipment tracking, freight coordination, and carrier performance monitoring across North America.
• Assist with inventory reconciliation, cycle counts, and stock analysis to maintain accurate inventory records
• Analyze inventory data to identify slow-moving stock, excess inventory, and shortage risks
• Help develop and maintain dashboards and reports tracking key logistics and inventory KPIs
• Support supply planning activities for the JetStream product line
• Collaborate with supplier and planning teams to flag supply risks
• Contribute to S&OP preparation by consolidating supply and demand data
• Own at least one independent analytical project over the course of the internship
• Identify process inefficiencies and propose data-driven improvements

Supply Chain Analyst, Intern

• Create, manage & execute build schedules aligned to demand plan & CM capacity
• Track WIP daily: monitor yield, flag deviations, and drive corrective actions
• Manage ECN/PCN implementation at the CM
• Own CM capacity slot management & build prioritization
• Create and track purchase orders across all consigned components for PCBA
• Perform PO-to-invoice reconciliation; investigate and resolve discrepancies
• Own PCBA cost variance analysis
• Prepare monthly PPV reports
• Coordinate supplier payment schedules and resolve invoice disputes
• Coordinate Asia freight for components & finished goods
• Manage 3PL partner relationships, SLAs, and performance metrics
• Handle export documentation, customs compliance
• Execute last-mile fulfillment for customer shipments originating from Asia
• Run component-level MRP and manage shortage resolution
• Monitor inventory for raw materials, WIP, and finished goods
• Establish Inventory Metrics & forecast model for the company
• Leverage AI tools for day-to-day operations
• Lead projects to scale operations using AI/automation

Supply Chain Manager

Manager

• Design, implement, and maintain scalable infrastructure supporting manufacturing operations
• Ensure system reliability, security, and performance for production-critical applications
• Troubleshoot complex technical issues with minimal downtime impact

Senior Manufacturing Infrastructure Manager

Engineer

• Lead the end-to-end modeling, simulation, and correlation efforts—from the silicon die through the package and across the system PCBA.
• Drive the SI/PI strategy for next-generation AI accelerators.
• Lead the modeling and analysis of complex multi-chip packages.
• Design and optimize the Power Delivery Network (PDN) to meet stringent Z_Target requirements.
• Perform comprehensive channel simulations using IBIS-AMI models.
• Lead the "Gold Suite" validation in the lab.

Senior Signal Integrity Engineer

• Define and execute comprehensive HW qualification plans (EVT/DVT/PVT) for complex AI accelerator systems
• Lead the implementation of HALT/HASS, thermal cycling, humidity, and vibration testing
• Provide senior-level oversight for the validation of high-speed SerDes, LPDDR, CoWOS designs
• Drive root-cause analysis for complex system-level failures using various analytical tools
• Oversee the qualification of high-bandwidth interconnects and PCIe link stability
• Work directly with Design, Thermal, and Firmware teams to implement hardware fixes
• Partner with Contract Manufacturers and JDMs to align on test methodologies

Senior Hardware Qualification Engineer

Software Engineer

• Participate in the full PCB design release process, including reviewing Gerber files, validating stack-ups, and resolving DFM queries from external fabrication vendors.
• Track and analyze manufacturing yields at PCB suppliers; provide regular performance readouts to the Operations team and identify specific process areas for improvement.
• Support bare PCB qualification and acceptance testing in strict accordance with IPC standards (IPC-A-600/610).
• Perform detailed data analysis on test coupon measurements, collaborating directly with Signal Integrity leads to ensure physical boards meet high-speed performance requirements.
• Conduct market research on emerging PCB technologies, advanced substrate materials, and new supplier capabilities to build a strategic internal knowledge base.

Manufacturing Engineering Intern – PCB

Mechanical Engineer

• Assist in the foundational setup of the Thermal and Mechanical R&D lab
• Figure out and document the procedures to power and run PCIe accelerator cards in a standalone environment for thermal stress testing
• Execute rigorous aerodynamic characterization using a wind tunnel
• Support the development of CFD (Computational Fluid Dynamics) models
• Prepare laboratory test setups and prepare test samples for thermal characterization
• Create "Gold Standard" documentation for laboratory procedures and maintain meticulous records of all experimental test data

Thermal & Mechanical Engineering Intern

AI Engineer

• Design and implement AI-powered solutions that improve manufacturing workflows
• Build AI agents that diagnose hardware test failures
• Design LLM-powered pipelines that structure unstructured supplier and factory reports
• Prototype intelligent document workflows for financial and procurement records
• Benchmark multiple LLM backends for production deployment
• Collaborate with engineers to validate model accuracy

Applied AI Engineering Intern

• Lead the layout for high-complexity AI accelerator cards (PCIe form factors) and massive system baseboards.
• Architect and manage the Constraint Manager (CM) hierarchy within Cadence Allegro.
• Drive productivity by developing or implementing automation scripts (SKILL, Python, or TCL).
• Execute layout for ultra-high-speed interfaces, including PCIe Gen5/6, CXL, and custom die-to-die (D2D) interconnects.
• Work with Power Engineers to implement complex PDN strategies.
• Drive the definition of PCB stack-ups with advanced low-loss materials.
• Act as the primary interface with PCB fabricators and CMs for DFM, DFT, and DFA requirements.

Senior PCB Design Engineer

• Lead architect for the energy backbone of AI accelerators
• Architect end-to-end power delivery solutions for high-TDP AI accelerators
• Lead power delivery for chiplet-based architectures
• Drive power integrity strategy across the board
• Partner with Hardware Qualification and SI/PI teams to define validation suites
• Drive technical requirements and design reviews with ODM partners
• Collaborate with thermal engineers to optimize layout for heat dissipation

Principal System Power Engineer

Architect

• Responsible for pre-silicon power estimation of the blocks in design.
• Work with front-end and DV engineers to identify power activity in design.
• Build architectural power estimation tool for AI workloads.
• Work with frontend architects and backend design for performance monitor analysis.
• Design micro-architecture and perform RTL, synthesis, logic and physical power performance verification.
• Implement performance enabling and power saving/monitoring functions.

Senior Staff Power Performance Architect – Accelerator Design

Hardware Engineer

• Lead the end-to-end hardware development lifecycle for complex, high-performance AI accelerator PCIe cards and chassis platforms.
• Own schematic capture, component selection, and rigorous BOM management for multi-rail, high-power designs.
• Architect and oversee the layout of ultra-high-speed interfaces, including PCIe Gen5/6, CXL, and custom chiplet-to-chiplet interconnects.
• Design robust power delivery networks capable of handling high-current transients and low-voltage rails characteristic of advanced AI silicon.
• Partner closely with Silicon, Signal Integrity (SI/PI), Thermal, and Mechanical teams to ensure seamless integration and performance.
• Drive Design for Excellence (DFM, DFT, DFA) to ensure high-yield production and long-term reliability in data center environments.
• Act as a technical lead, guiding junior engineers and setting the standard for hardware design best practices across the company.

Principal Systems Hardware Engineer

SDET

• Lead junior team members with test planning, test automation, and test execution
• Responsible for the development of the test suites, the test cases, and the test infrastructures
• Work side by side with the software development teams to design, automate, and execute software and system use cases
• Implement Python programs to test workloads and ML models within the Pytest framework
• Implement and improve the d-Matrix end-to-end test suite along with the regression test suite in CI/CD infrastructure using pytest, Jenkins, and GitLab
• Collaborate with the product team, software development team, and systems team on the test coverage and test results
• Fully engage with test case implementation and software bug triaging and debugging
• Fluent in advanced Python programming with the ability to write data structures and algorithms

Principal Software Engineer – ML Test

• Responsible for the micro-architecture and design of the AI Compute sub-system modules including Hardware Execution Engines.
• Own design, document, execute and deliver fully verified, high performance, area, and power efficient RTL.
• Design of micro-architecture and RTL, synthesis, logic and timing verification using leading edge CAD tools and semiconductor process technologies.
• Design and implement logic functions that enable efficient test and debug.
• Participate in silicon bring-up and validation for blocks owned.

Principal Digital Design Engineer, Micro-Architect

Platform Engineer

• Develop world-class products around d-Matrix inference accelerators
• Engage with key customers and internal teams
• Technically analyze and define outside-in usage cases
• Design AI server and rack-scale solutions
• Work closely with Datacenter customers & OEM/ODM partners
• Contribute to future generations of products and solutions