d-Matrix

Hardware Engineer

• Lead the end-to-end hardware development lifecycle for complex, high-performance AI accelerator PCIe cards and chassis platforms.
• Own schematic capture, component selection, and rigorous BOM management for multi-rail, high-power designs.
• Architect and oversee the layout of ultra-high-speed interfaces, including PCIe Gen5/6, CXL, and custom chiplet-to-chiplet interconnects.
• Design robust power delivery networks capable of handling high-current transients and low-voltage rails characteristic of advanced AI silicon.
• Partner closely with Silicon, Signal Integrity (SI/PI), Thermal, and Mechanical teams to ensure seamless integration and performance.
• Drive Design for Excellence (DFM, DFT, DFA) to ensure high-yield production and long-term reliability in data center environments.
• Act as a technical lead, guiding junior engineers and setting the standard for hardware design best practices across the company.

Principal Systems Hardware Engineer

SDET

• Lead junior team members with test planning, test automation, and test execution
• Responsible for the development of the test suites, the test cases, and the test infrastructures
• Work side by side with the software development teams to design, automate, and execute software and system use cases
• Implement Python programs to test workloads and ML models within the Pytest framework
• Implement and improve the d-Matrix end-to-end test suite along with the regression test suite in CI/CD infrastructure using pytest, Jenkins, and GitLab
• Collaborate with the product team, software development team, and systems team on the test coverage and test results
• Fully engage with test case implementation and software bug triaging and debugging
• Fluent in advanced Python programming with the ability to write data structures and algorithms

Principal Software Engineer – ML Test

Mechanical Engineer

• Responsible for the micro-architecture and design of the AI Compute sub-system modules including Hardware Execution Engines.
• Own design, document, execute and deliver fully verified, high performance, area, and power efficient RTL.
• Design of micro-architecture and RTL, synthesis, logic and timing verification using leading edge CAD tools and semiconductor process technologies.
• Design and implement logic functions that enable efficient test and debug.
• Participate in silicon bring-up and validation for blocks owned.

Principal Digital Design Engineer, Micro-Architect

Platform Engineer

• Develop world-class products around d-Matrix inference accelerators
• Engage with key customers and internal teams
• Technically analyze and define outside-in usage cases
• Design AI server and rack-scale solutions
• Work closely with Datacenter customers & OEM/ODM partners
• Contribute to future generations of products and solutions

Senior Director, Customer Platform Engineering

Full-stack Engineer

• Be part of the team that helps productize the SW stack for our AI compute engine.
• Responsible for the development, enhancement, and maintenance of software kernels for next-generation AI hardware.
• Experience building software kernels for HW architectures.
• Strong understanding of various hardware architectures and how to map algorithms to the architecture.
• Map computational graphs generated by AI frameworks to the underlying architecture.
• Work across all aspects of the full-stack toolchain and understand nuances of hardware-software co-design.
• Build and scale software deliverables in a tight development window.
• Collaborate with a team of compiler experts to build out the compiler infrastructure, closely working with software and hardware experts in the company.

Software Engineer, Staff – Kernels

• Help architect and develop the kernel authoring SDK that targets our novel Corsair dataflow architecture.
• Champion software engineering best practices across the team by establishing robust CI/CD pipelines, driving automated testing, and enforcing rigorous code review processes.
• Build intuitive, domain-specific APIs, determining the optimal boundaries for kernel developers and compiler teams.
• Create development tools to be used in kernel authoring and modeling lowering flows.
• Lead and mentor junior engineers, fostering a culture of technical excellence, accountability, and collaborative problem-solving.
• Leverage systems engineering ability to understand complex interactions between hardware and software components, proposing and implementing solutions integral to the software stack.
• Take ownership of delivering solutions by interacting with stakeholders, generating requirements, documenting designs, implementing, debugging, and deploying.
• Build and scale software deliverables in a tight development window.

Principal Software Engineer – SDK, Lowering Stack

Designer

• Analog-mixed signal integrated circuit design using common circuit design tools from Cadence and Synopsys.
• Design state of the art In-Memory-Compute engine for Artificial Intelligence Inference Accelerator and High-Speed Die-2-Die Interface for scale-out.
• Job scope includes schematic circuit design, system level performance analysis, design test benches for simulations and verifications.
• Guide layout engineers on layout in deep sub-micron process nodes from 4nm and below.
• Optimize design and layout to achieve low power design performance over process-voltage-temperature corners and six-sigma Monte-Carlo yield analysis.
• Independent minor layout tweaks when necessary.
• Work with backend engineers on integration of design/layout.
• Provide model of circuit for backend verification.
• Participate in Evaluation Board design for silicon bring-up and bench debug or characterization.
• Build scripts for silicon bring up and test features.

Analog Design Engineer – L4/L5

Architect

• Analyze the latest ML workloads (multi-modal LLMs, CoT reasoning models).
• Contribute Hardware and Software features for inference accelerators.
• Stay updated on latest research in ML Architecture and collaborate with teams.
• Analyze properties of emerging machine learning algorithms and workloads.

Principal Architect, Performance Analysis and Modeling

Artificial Intelligence

• Contribute to features for next generation inference accelerators
• Keep up with latest research in ML architecture and algorithms
• Collaborate with design, verification, and software teams
• Map machine learning algorithms into functional performance specifications
• Propose features to enable or accelerate algorithms
• Study benefits of proposed features with system models

AI Software Architect Intern

Engineering Manager

• The role requires you to be part of the team that helps productize the SW stack for our AI compute engine.
• As part of the software team, you will be responsible for the development, enhancement, and maintenance of software kernels for next-generation AI hardware.
• You possess experience building software kernels for HW architectures.
• You possess a very strong understanding of various hardware architectures and how to map algorithms to the architecture.
• You understand how to map computational graphs generated by AI frameworks to the underlying architecture.
• You have had past experience working across all aspects of the full-stack toolchain and understand the nuances of what it takes to optimize and trade off various aspects of hardware-software co-design.
• You are able to build and scale software deliverables in a tight development window.
• You will work with a team of compiler experts to build out the compiler infrastructure, working closely with other software (ML, systems) and hardware (mixed signal, DSP, CPU) experts in the company.

Manager, Software Engineering – Kernels

• Assist in designing critical analog blocks for D2D links, such as high-speed drivers, receivers, clock distribution networks, and voltage regulators.
• Perform detailed transient, noise, and Monte Carlo simulations using industry-standard tools like Cadence Virtuoso and SPICE.
• Validate key performance metrics including Signal Integrity (SI), power consumption, and jitter to ensure compliance with standards like UCIe.
• Develop high-level behavioral models (e.g., in Verilog-A or MATLAB) to speed up top-level system simulations.
• Work with layout engineers to oversee critical physical design aspects, ensuring proper shielding and matching to minimize parasitic effects.
• Document design methodologies and present simulation results during internal technical reviews.

Analog IC Design Intern

• Develop high performance kernels essential for accelerating Machine Learning models
• Develop reference implementations for accuracy verification
• Define unit tests for implemented operators
• Performance tuning and scalability analysis across varied problem sizes
• Collect performance metrics and identify bottlenecks to improve core functionality
• Package and ship the final implementations

Software Engineering Intern – Kernels

Software Engineer

• Development of tools and methodologies for silicon validation:
• Automation of data collection
• Instrument control interface
• Database back end including outlier detection and classification
• Data post processing and analysis for margining and debug
• Linear and logical regression, clustering, plot and report generation
• Work with high speed serial interfaces including PCI Express Gen5, LPDDR5 memory, and die to die interconnections on multi-chip module

Design Validation Engineering Intern

DevOps Engineer

• Support, monitor, and improve CI/CD execution environments, runners, and infrastructure used across engineering teams.
• Troubleshoot and resolve build issues, pipeline failures, environmental inconsistencies, and infrastructure incidents.
• Manage and automate configuration of Linux-based systems, containers, and internal services used by development teams using Ansible and Terraform.
• Own deployment, upgrade, and reliability workflows for shared tools and internal systems.
• Develop automation for routine operational tasks using Ansible, Python, and Bash.
• Create and maintain dashboards, alerting, and monitoring to ensure high availability and performance of DevOps-managed services.
• Partner with Global DevOps team members and Software Infra engineers to build a scalable, global support structure.
• Document processes, runbooks, troubleshooting guides, and onboarding materials to support a distributed DevOps team.

Senior DevOps Engineer

• Be part of the team that helps productize the SW stack for our AI compute engine.
• Responsible for the development, enhancement, and maintenance of software kernels for next-generation AI hardware.
• Possess experience building software kernels for HW architectures.
• Build and scale software deliverables in a tight development window.
• Collaborate with a team of compiler experts to build out the compiler infrastructure, working closely with other software (ML, systems) and hardware (mixed signal, DSP, CPU) experts in the company.