About the role
- Leading an ASIC Design Verification Team and deliver block level and full chip verification and emulation activities with high quality
- Overseeing verification test planning, execution, and the development of innovative verification methodologies
- Driving functional and code coverage closure
- Collaborating closely with RTL, architecture, software/firmware, emulation, and post-silicon validation teams
- Contributing to the development and execution of a DV strategy that aligns with the company’s objectives for first pass silicon success
- Hiring, training, and supporting a team of ASIC engineers to ensure timely and cost-effective product development
- Supporting the organizational goals through people management aspects
Requirements
- 15 + years’ experience in ASIC/SoC design verification
- 5 + years’ experience leading a team of direct reports
- Expertise in design verification tools such as Synopsys VCS and Verdi
- Proven success in first-pass ASIC development
- Experience managing multiple projects and adjusting priorities with stakeholders
- Proficiency in developing UVM constrained random test benches
- Strong understanding of interpreting functional specifications and creating comprehensive test plans
- B.S. or M.S. in Computer Engineering, Electrical Engineering, or related technical field, or equivalent practical experience
- Experience in building UVM environments from scratch (preferred)
- Previous experience in a startup environment, demonstrating adaptability and a hands-on approach (preferred)
- Expertise in working with networking System on Chips (SOCs) (preferred)
- Strong leadership in a dynamic, fast-paced development environment (preferred)
- Health and retirement benefits
- Equity, cash, and incentives
- Medical, dental, and vision coverage
- Disability and life insurance
- Dependent care flexible spending account
- Accidental injury insurance
- Pet insurance
- Generous paid holidays
- 401(k) with company match
- Open Time Off (OTO) for regular full-time exempt employees
- Sick time
- Bonding leave
- Pregnancy disability leave
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
ASIC design verificationSoC design verificationUVM constrained random test benchesdesign verification toolsfunctional specificationstest plansUVM environmentsfirst-pass ASIC developmentcode coverage closureverification methodologies
Soft skills
leadershippeople managementcollaborationadaptabilityproject managementcommunicationteam supporttrainingexecutioninnovation
Certifications
B.S. in Computer EngineeringM.S. in Electrical Engineeringrelated technical field degree