Cirrus Logic

Machine Learning Engineer

• Rapid Prototyping: Assist in building and testing ML models for edge intelligence, specifically focusing on audio, sensor, and control signals.
• Data & Model Engineering: Support the design of model architectures and contribute to data labeling strategies, synthetic data generation, and augmentation pipelines.
• Edge Optimization: Explore and implement model compression techniques—such as quantization, pruning, and knowledge distillation—to ensure models run efficiently on embedded systems.
• Exploration & Benchmarking: Stay current on foundation/SLM trends and academic research; help define benchmarks and evaluation metrics to measure the success of CVL’s ML prototypes.
• Cross-Functional Collaboration: Partner with firmware, silicon, and systems engineers to understand the physical constraints of hardware and how they impact algorithmic accuracy.

Summer Intern, Embedded Machine Learning Engineer – AI/ML

Recruitment

• Document, standardize, and maintain end-to-end TA processes, SOPs, and operating rhythms to drive consistency, efficiency, and a high-quality experience globally.
• Monitor adherence to TA policies, workflows, and SLAs; identify bottlenecks and lead continuous improvement efforts.
• Maintain TA process documentation, intake guides, interview frameworks, and hiring manager toolkits; support change management for new or updated processes.
• Serve as a primary administrator for TA systems, ensuring configuration supports global processes, compliance, and reporting needs.
• Ensure data integrity and governance across recruiting systems; define standards for requisitions, candidate records, and dispositioning.
• Design, build, and maintain TA dashboards and reports that track core KPIs.
• Proactively analyze recruiting data to surface trends, risks, and opportunities; translate findings into clear narratives and recommendations.
• Partner closely with recruiters, HRBPs, and business leaders to understand needs and ensure TA operations support business goals.
• Lead or support TA transformation initiatives, including system migrations and process re-design efforts.

Talent Acquisition Operations Analyst

Application Engineer

• Provide direct engineering support to customers to ensure the successful integration and optimization of Cirrus Logic’s advanced audio amplifier solutions.
• Support the design and review of customer's PCB schematics and layouts
• Conduct customer-application focused circuit analysis and data collection
• Travel to customer sites to support design-in and debug activities
• Lead the design of the customer development boards for new audio products
• Develop product collateral such as application notes, reference designs and demos
• Communicate and collaborate effectively with cross-functional teams during the product development. This includes working with IC Design engineers, Systems engineers, Validation engineers, Test Engineers, Software engineers, and others
• Support the Marketing and Sales teams during the product promotions and conferences
• Collaborate with the Systems team on the definition of new products and features
• Lead technical trainings for customer and field teams
• Autonomously handle and prioritize tasks with strong sense of ownership and high sense of urgency

Audio Applications Engineer

Mechanical Engineer

• Design and implement digital subsystems and IP blocks for mixed‑signal ICs from architecture through tape‑out.
• Develop RTL designs using Verilog and support integration into larger SoC environments.
• Design and verify DSP, control, and data‑path logic, including calibration and monitoring state machines.
• Perform functional verification, integration verification, and support UVM‑based verification teams.
• Contribute to behavioral and system modeling of digital and mixed‑signal systems.
• Support post‑silicon validation, characterization, and production test, including lab bring‑up and silicon debug.
• Collaborate across disciplines to ensure correct interaction between digital logic and analog circuitry.
• Participate in design reviews, tape‑out readiness, and root‑cause analysis for silicon or system issues.

Staff Digital Design Engineer

Designer

• Develop comprehensive verification plans aligned with design and system requirements.
• Perform functional verification of custom mixed-signal ASICs at block and chip level.
• Design and implement UVM-based testbenches, including infrastructure, scoreboards, checkers, and assertions.
• Create directed and constrained-random test suites to ensure robust functional coverage.
• Implement, analyze, and drive functional and code coverage, including coverage closure.
• Conduct failure analysis, regression triage, and debug, resolving functional and timing-related issues.
• Run and debug gate-level simulations, including timing violations and back-annotation issues.
• Develop and maintain digital and mixed-signal behavioral models to support verification.
• Support verification flow and infrastructure development, including regressions and automation.
• Collaborate cross-functionally with digital/analog design, systems, applications, firmware/software, and manufacturing test teams.
• Contribute to both pre-silicon verification and post-silicon validation efforts.
• Proactively improve verification methodologies, processes, and best practices.

Senior Staff Design Verification Engineer

Senior Design Verification Engineer

Staff Design Verification Engineer

• Work in a team environment to create and engineer digital design subsystems from concept through to tape-out
• Convert subsystems into final designs for integration into the final product
• Support post-silicon activities including validation, characterization, and product test
• Design and develop a variety of digital and DSP IP blocks

Digital Design Engineer

• Lead rapid prototyping of ML models for edge intelligence across Voice, Sense, and Control domains, tightly integrated with Cirrus Logic’s mixed-signal processing strengths.
• Build datasets, design model architectures, and optimize performance, efficiency, and interpretability. Explore advanced approaches in ML-augmented signal processing, anomaly detection, and adaptive control.
• Collaborate with silicon, firmware, and systems teams to co-design ML architectures that operate efficiently on constrained hardware and embedded systems, balancing algorithmic accuracy with compute and power budgets.
• Stay at the forefront of ML frameworks, foundation/SLM trends, and physical-world AI applications. Scout external IP, academic work, and startups to inform CVL’s ML strategy.
• Provide guidance and technical direction to away-team engineers and contributors across Cirrus Logic. Share best practices in ML model lifecycle, from experimentation to deployment.
• Work hand-in-hand with Innovation Managers, advisory teams, customers, and external partners to identify opportunities, define success criteria, and validate ML-enabled innovations in real-world scenarios.
• Help define benchmarks, evaluation metrics, and pass/fail criteria that ensure ML prototypes address significant industry problems with clear paths to monetization.

Embedded Machine Learning Engineer – AI/ML

Program Manager

• Lead and facilitate executive‑level and working‑level engagements with Cirrus Logic, SoC partners, and customers across engineering, marketing, and business teams. Define agendas, develop presentations, and drive productive discussions.
• Establish and maintain a robust end‑to‑end program management framework to track customer programs and designs, including objectives, schedules, milestones, risks, issues, and decision checkpoints.
• Synthesize complex technical and program information into clear, concise materials for effective communication with internal and external stakeholders at all levels.
• Develop a strong understanding of the PC roadmap, Cirrus Logic product capabilities, and key enabling technologies. Partner closely with SoC vendors to align plans and ensure training, workshops, and communications are optimized for customer needs.
• Communicate program schedules, delivery plans, and status updates clearly and consistently to the sales organization and internal partners.
• Drive execution and coordination of all PC software and SoC‑related programs across the full product lifecycle, from concept through production and sustainment.
• Build and maintain a broad, trusted network across customer and partner organizations to foster collaboration, transparency, and alignment.
• Work closely with Sales and business segment teams to proactively identify and resolve risks, manage escalations, and ensure program success.
• Identify and drive opportunities for deeper customer and partner engagement, including co‑design, co‑validation, and new or improved working models that support mutual goals.

Customer Program Manager – PC

Engineer

• Drive the development of our I/O library—leading the design, simulation, characterization, and validation of advanced I/O pad structures.
• Define and implement our chip‑ and IP‑level ESD methodology, ensuring every product meets the highest standards of robustness and reliability.
• Design ESD protection devices, create silicon test structures for ESD and latch‑up evaluation, and translate silicon data into optimized design rules.
• Collaborate closely with our foundry partners on ESD library updates and LUP rule development.
• Shape product reliability across Cirrus Logic’s entire mixed‑signal portfolio.

ESD Engineer

Solutions Engineer

• Serve as the primary enablement and solutioning partner for enterprise AI and knowledge platforms across the organization
• Guide users toward practical, high-value use cases, and set clear expectations around platform capabilities, limitations, and delivery timelines
• Lead onboarding and training sessions, including AI 101, role-based training, and agent support
• Develop scalable enablement materials, documentation, and best practices
• Support users with search, prompting, agents, and automations, including helping them choose the right approach for the need
• Intake, triage, and shape custom agent and automation requests based on business needs and platform fit
• Partner with PMO to prioritize discovery and solution design efforts
• Translate business needs into technical requirements and scoped solution briefs
• Collaborate with engineering teams to assign and support development resources
• Analyze usage patterns and user behavior to improve enablement strategies, content architecture, and solution design
• Develop a deep understanding of Cirrus Logic’s knowledge architecture across Confluence, Jira, GitHub, SharePoint, and related systems to improve search relevance, content quality, and discoverability
• Partner with system owners to improve content hygiene, metadata standards, permissions models, and governance practices that directly impact AI-driven search effectiveness

Solutions Engineer – Enterprise Knowledge, AI Systems

• Architect and develop a Rapid Prototype Platform (similar to Cadence Protium) to enable early firmware development.
• Synthesize digital DUTs for emulation and prototyping environments.
• Design and implement SystemVerilog synthesizable transactors with C-DPI interface to enable C/C++ based tests.
• Validate and test the prototyping platform, ensuring functional correctness and robustness.
• Optimize platform performance, capacity, and scalability for firmware development and debug.
• Develop synthesizable analog and mixed-signal models suitable for emulation environments.
• Perform bare-metal firmware bring-up, including early boot, drivers, and system initialization.
• Debug firmware issues across emulation, prototyping, and early silicon environments.
• Collaborate closely with hardware, firmware, and software teams to benchmark, specify, develop, and deploy processors for mixed-signal chips.
• Define processor performance metrics and contribute to architectural trade-off studies.
• Support deployment and validation of processors in mixed-signal SoC products.

Emulation Engineer

• Support the formal verification team to follow, and improve, defined methodology practices.
• Develop test plans and verification methodologies to formally verify the microarchitecture and design.
• Perform failure analysis and resolution, coverage analysis, and population.
• Implement and improve functional and formal verification.

Formal Verification Engineer, Co-Op

• Contribute to the development of digital logic circuits such as digital filters
• Design and implement RTL modules using Verilog for DSP and data conversion ICs
• Perform logic simulation, functional verification, and synthesis
• Collaborate with the design team on integration and system-level verification
• Assist with test vector generation and lab test development