Develop and execute comprehensive verification plans for FPGA and ASIC designs implementing beamforming, SDR, and digital communication systems
Create advanced testbenches using System Verilog and UVM (Universal Verification Methodology)
Design constrained-random stimulus generators and self-checking verification environments
Develop functional coverage models to ensure completeness of verification
Create bus functional models (BFMs) and verification IP for standard and custom interfaces
Implement assertion-based verification using SVA (System Verilog Assertions)
Debug complex RTL/gate-level simulation failures and work with designers to resolve issues
Develop co-simulation frameworks linking MATLAB/Python models with RTL simulations
Support formal verification efforts for critical control logic and safety-critical blocks
Create and maintain regression test suites and continuous integration flows
Participate in design reviews, identifying potential verification challenges early

Requirements

B.S. in Electrical Engineering, Computer Engineering, or related field with 7+ years of experience in digital verification
Strong expertise in System Verilog and verification methodologies (UVM, OVM, or VMM)
Experience verifying complex digital designs (DSP, communications, or high-speed interfaces)
Proficiency with industry-standard simulation tools (ModelSim, VCS, Xcelium, or Questa)
Understanding of functional coverage, code coverage, and assertion-based verification
Experience debugging RTL simulations and tracking down complex bugs
Familiarity with scripting languages (Python, Perl, TCL) for test automation.

Benefits

Medical, dental, vision, basic and supplemental life insurance
Paid parental leave
Short and long-term disability
401(k) with a company match of up to 5%
Education Support Program
Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.

Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools

System VerilogUVMSVAdigital verificationfunctional coverageassertion-based verificationtest automationdebugging RTL simulationsconstrained-random stimulus generatorsco-simulation frameworks

Soft Skills

problem-solvingcommunicationcollaborationattention to detailanalytical thinking