Engineer – DFT
Arrow Electronics
full-time
Posted on:
Location Type: Office
Location: Ahmedabad • 🇮🇳 India
Visit company websiteJob Level
Mid-LevelSenior
About the role
- Define DFT architecture
- Set-up DFT flow
- Implement scan insertion
- Debug iJTAG and IEEE 1500 core wrapper
- Create timing constraints
- Diagnose ATE pattern failures
- Automate flow with scripting
Requirements
- 3+ years of hands-on experience in defining DFT architecture and setting-up DFT flow
- Scan insertion, MBIST insertion and Boundary Scan implementation at Fullchip level
- ATPG and Pattern verification at Fullchip level
- Implement and debug iJTAG and IEEE 1500 core wrapper-based architecture
- Create DFT modes timing constraints
- Pattern diagnosis and debug the ATE pattern failures
- Very good debugging skills
- Scripting for flow automation
- Familiarity with tools: Synopsys tools: DFTMAX, TetraMAX, VCS, Verdi and PT OR Cadence tools: Genus and Modus, NC-SIM/Irun, Sim-Vision, LEC OR Mentor Graphics tools: Tessent tool chain, TestKompress, Questa
- Familiarity with ATE and LBIST will be a plus
Benefits
- Health insurance
- Retirement plans
- Paid time off
- Flexible work arrangements
- Professional development
Applicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard skills
DFT architectureDFT flowscan insertionMBIST insertionBoundary Scan implementationATPGpattern verificationiJTAGIEEE 1500 core wrapperscripting
Soft skills
debugging skills