Terra Quantum AG

Software Engineer

• The Senior FPGA Developer will be a member of the core team building the Quantum Key Distribution system. The focus is end-to-end RTL ownership on AMD/Xilinx (Artix-7, Kintex UltraScale): architect, implement, verify, and close timing on high-rate interfaces and deterministic pipelines. The role also sets engineering discipline for FPGA development and mentors a junior engineer.
• The Senior FPGA Developer owns the FPGA architecture/codebase and collaborates closely with embedded/software to define clean contracts, ensure reliable bring-up, and deliver reproducible, versioned bitstreams.
• RTL architecture, interfaces, and rather high-speed datapaths
• Owning SystemVerilog RTL architecture/implementation for Artix-7 and Kintex UltraScale (SystemVerilog, Vivado)
• Implementing DDR3/DDR4 controllers integration, PCIe endpoint/DMA, and Ethernet/SFP paths; evaluating/integrating third-party MAC/PCS IP
• Building deterministic acquisition/timing/sifting layers — packetization, buffering, alignment; robust clocking/CDC/reset; custom low-level protocols — and bridging them to high-throughput interfaces (DDR/PCIe)
• Defining clear AXI/AXI-Stream boundaries and register maps for SW/FW integration
• Constraints, timing closure, and floorplanning
• Authoring and maintaining XDC constraints (clocks, I/O, exceptions); achieving consistent timing closure across corners
• Applying practical floorplanning (pblocks, placement guidance) and CDC methodology; analyzing reports and iterating for margin
• Verification and CI
• Establishing a professional verification environment with ModelSim/Questa; developing self-checking testbenches and regression suites; integrating Python/cocotb co-simulation with software harnesses/mocks; defining coverage goals (OSVVM/UVM as appropriate)
• Building CI for lint/sim/synth/impl; archiving reports/bitstreams; automating regressions (including cocotb) and basic HW in-the-loop smoke tests
• Bring-up, debug, and releases
• Board bring-up and debug using ILA/logic analyzers; link training, memory calib, and protocol bring-up
• Owning bitstream packaging, versioning, and release notes; ensuring reproducible builds and traceable artifacts
• Cross-team collaboration and mentoring
• Driving system integration with SW/FW: register/driver contracts, throughput/latency budgets, HIL
• Mentoring a junior engineer; codifying style guides, reviews, and design documentation

Senior FPGA Developer, SystemVerilog

Backend Engineer

• System architecture and team leadership
• Owning the QKD backend architecture: control-plane services, key sifting/post-processing integration, configuration management, monitoring, and external interfaces
• Defining module boundaries and service APIs; evolving the system toward clear data/control-plane separation
• Leading and mentoring other software engineers; driving code/design reviews, documentation standards, and delivery cadence
• Coordinating with product, optics, FPGA, and embedded teams to plan milestones and de-risk integrations and demos
• Designing and implementing high-performance Python services on Linux (asyncio, websockets, NumPy); profiling and tuning for latency and throughput
• Developing, profiling, and optimizing QKD post-processing algorithms to maximize key rate and minimize end-to-end latency
• Defining and maintaining robust interfaces with embedded/FPGA over UART/USB/PCIe/Ethernet
• Establishing versioned, stable control/data-plane APIs; building simulators/mocks to unblock parallel development
• Guiding downstream system integration (WebSocket/gRPC/REST) and ensuring clear contracts and backward compatibility
• Building and maintaining CI/CD with Docker and GitHub Actions

Senior Backend Software Engineer – Lead

Systems Engineer

• The Embedded Engineer will be a member of the hardware team delivering mixed-signal control and instrumentation for our QKD systems
• Hardware design, prototyping, and validation
• Designing analog/digital schematics and multilayer PCBs in Altium Designer; component selection; stack-up, impedance control, SI/PI
• Planning DFM/DFT; test point strategy; manufacturing checks
• Managing prototype builds and vendors; executing bring-up plans, precision and high-frequency measurements, and validation; lab debug and reworks
• Firmware development on STM32
• Implementing STM32 F4/H7 firmware in C using HAL/LL: peripheral drivers (SPI/I2C/UART/CAN/USB/Ethernet), DMA/IRQ, timers, and deterministic control loops
• Building robust bootloader and OTA update flows (USB/UART/Ethernet) with recovery, versioning, and rollback; watchdogs, fault logging, and persistent configuration
• Integrating with FPGA/software via clean register/protocol contracts; meeting latency/throughput budgets
• Test automation and CI
• Building automated board/firmware test setups (Python/pytest as useful); capturing logs/metrics; basic HIL smoke tests
• Establishing repeatable build/test pipelines for firmware and board validation; archiving artifacts and measurements
• Producing manufacturing packages and ECOs; supporting vendors through fabrication, assembly, and bring-up
• Owning hardware/firmware versioning and release notes; maintaining traceable revisions
• Collaborating with optics/FPGA/software on interfaces, calibration, and integration
• Authoring design docs, calibration/bring-up procedures, and change logs

Embedded Engineer, PCB Design, STM32 Firmware

Security Engineer

• Support customer engagements across the PQC lifecycle, from cryptographic discovery to solution design and technical validation.
• Design and recommend cryptographic solutions involving PQC algorithms (Kyber, Dilithium, SPHINCS+), classical interoperability, and crypto agility.
• Advise on solutions for key management (KMS, HSM, cloud environments) and protocol-level architecture (TLS, VPN).
• Collaborate with Product Engineering to translate customer requirements into product improvements.
• Track PQC regulatory developments to inform customer guidance and product development.
• Engage in customer meetings to gather requirements and provide technical insights.
• Lead technical workshops, demos, and proofs of concept (POCs) for customer stakeholders.
• Participate in conferences, thought leadership activities, and standards discussions when relevant.
• Prepare technical solution diagrams, statements of work (SOWs), and proposal inputs for customers.
• Support RFP responses and technical validations in collaboration with Product and Delivery teams.
• Collaborate with internal teams to ensure scalable, compliant, and production-ready solutions.

Senior FPGA Developer, SystemVerilog

Senior Backend Software Engineer – Lead

Embedded Engineer, PCB Design, STM32 Firmware

Security Solutions Advisor – Technical Sales