Summa Linguae Technologies

Digital Design Diagram Creator

Summa Linguae Technologies

contract

Posted on:

Location Type: Remote

Location: Poland

Visit company website

Explore more

AI Apply
Apply

Salary

💰 $20 per hour

About the role

  • Creating a dataset of diagram images paired with one of two types of technical artefacts: Diagram + HDL code (Verilog/SystemVerilog) or Diagram + English technical explanation of the diagram
  • Workload distribution: 50% code-based, 50% description-based.
  • The required diagram types include: circuit diagrams, timing diagrams (waveforms), state diagrams (finite state machines).

Requirements

  • Individuals with knowledge or studies in: digital systems, hardware design, digital logic and electronics, FPGA/ASIC fundamentals, HDL languages (Verilog / SystemVerilog preferred; VHDL optional)
  • Proficiency in English sufficient to follow instructions and communicate clearly.
  • Ideal profile: recent graduates of technical fields or enthusiasts with relevant practical experience.
  • At least 60% gate-level diagrams
  • No more than 30% simple diagrams
Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills & Tools
HDLVerilogSystemVerilogdigital systemshardware designdigital logicelectronicsFPGAASICgate-level diagrams
Soft Skills
communicationfollowing instructions