Senior Engineer, Analog Mixed-Signal Design

SiTime

Sr. Engineer designing analog mixed-signal circuits for precision timing applications at SiTime.

Posted 7/15/2026full-timeRemote • 🇩🇪 GermanySeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in designing analog and mixed-signal circuits, with a strong focus on CMOS circuits, noise analysis, and chip integration. Proficient in using Cadence tools and programming languages such as Matlab and VerilogA to ensure high-quality circuit performance and validation.

Highest-signal resume keywords

Analog And Mixed-Signal Circuit DesignCMOS Circuit KnowledgeCadence Analog Design ToolsNoise AnalysisInteger-N And Fractional-N PLL Expertise

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Circuit DesignVerification SimulationsDFT And DFM ProvisioningTemperature SensorsSigma-Delta ADCsLow Noise RegulatorHigh-Speed Output DriversAnalog And Digital FiltersSub-Threshold CircuitsQuartz Or MEMS Oscillator

Soft Skills

Cross-Functional CollaborationDocumentation SkillsDesign Review Facilitation

Tools & Technologies

MatlabVerilogAOceanscript

Industry Keywords

Electrical EngineeringChip IntegrationDesign VerificationLayout ValidationSilicon Prototyping

About the role

Key responsibilities & impact

Design analog and mixed-signal circuits meeting architectural requirements and technical specifications
Contribute to the architectural definition of the design and chip integration
Perform calculations, design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFM
Work closely with Layout Engineers to validate proper layout, using all best-known methods
Document assigned blocks, and hold preliminary and final design review meetings
Actively participate in the chip bring up, evaluation and characterization, with emphasis on owned blocks
Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks
Support other projects as needed by management or as business needs change

Requirements

What you’ll need

M.S. in Electrical Engineering or related field with minimum 4 years of related experience, or Ph.D. in Electrical Engineering with minimum 2 years of related experience
Excellent academic record with published research projects prototyped and proven in silicon
Detailed knowledge of CMOS circuits and noise analysis
Core expertise in one of the following areas: Integer-N and fractional-N PLL (Sigma-Delta and LC), Sigma-Delta ADCs (preferably > 14 ENOB), Temperature Sensors, Analog and digital filters, Quartz or MEMS Oscillator, Sub-threshold circuits, Low noise regulator and bandgap, High-speed output drivers
Knowledge of programming languages: Matlab, VerilogA, Oceanscript
Ability to oversee circuit layout for critical blocks
Ability to perform noise analysis
Proficient in using Cadence analog design tools

Benefits

Comp & perks

Quarterly bonus tied to the achievement of innovation goals
Equity grants