Design Verification Engineer – Coherent Interconnect

Samsung Electronics

Design Verification Engineer contributing to verification strategies for coherent interconnect IPs at Samsung. Collaborating with global teams to ensure design excellence and productivity.

Posted 7/25/2026full-timeAustin • California, Texas • 🇺🇸 United StatesSeniorLead💰 $151,000 - $251,800 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates extensive expertise in design verification, particularly for coherent interconnect IPs, with a strong focus on developing reusable verification environments and methodologies. Proficient in ARM protocols and coding in System Verilog and UVM, while collaborating effectively with cross-functional teams to ensure design excellence.

Highest-signal resume keywords

Design VerificationCoherent InterconnectsSystem VerilogUVMARM Protocols

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Applicant Tracking System Keywords

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Hard Skills

Design VerificationTestbench DevelopmentSystem VerilogUVMARM ProtocolsGit Version ControlUnix ScriptingPerl ScriptingFormal Verification

Soft Skills

CollaborationProblem Solving

Industry Keywords

MicroarchitectureVerification MethodologiesInterconnect IPSoC DesignPerformance Verification

Tech Stack

Tools & technologies

PerlUnix

About the role

Key responsibilities & impact

Contribute to the verification of System IP, including coherent interconnects and caches
Execute verification strategy, implement best practices, and support project goals in collaboration with global cross-functional teams
Develop and maintain deep expertise in microarchitecture and design verification for coherent interconnect IPs
Architect, develop, and maintain reusable verification environments and testbenches
Support design excellence and thorough verification of key features
Contribute to defining new verification methodologies and improving flows and productivity
Collaborate with design, SoC, physical design, and performance verification teams to analyze and debug failures

Requirements

What you’ll need

10+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 8+ years with a Master’s Degree, or 6+ years with a Ph.D.
8+ years of professional experience in a design verification role building testbenches from scratch
Strong background in design verification of coherent interconnects
Proficiency in ARM protocols – CHI, AXI, ACElite, APB
Strong coding skills in System Verilog, UVM
Experience with Git version control, Unix/Perl scripting
Formal verification skills will be a plus

Benefits

Comp & perks

medical, dental, vision, life insurance
401(k)
onsite lunch
employee purchase program
tuition assistance (after 6 months)
paid time off
student loan program
wellness incentives
MBO bonus compensation
long term incentive plan and relocation