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Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Expertise in ASIC and FPGA digital architecture and design, including RTL coding and simulation in VHDL or Verilog, with a strong focus on timing closure and verification. Proven ability to provide technical leadership and improve design processes through innovative tools and practices.
Highest-signal resume keywords
RTL Coding and Simulation in VHDL or VerilogDigital Circuit Architecture and DesignASIC and FPGA Simulation and Synthesis ToolsTestbench Development for RTL VerificationTechnical Leadership in Project Design Teams
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
RTL CodingVHDLVerilogDigital Circuit DesignTiming AnalysisTestbench DevelopmentSystem VerilogC/C++PerlUnix
Soft Skills
Communication in English
Tools & Technologies
ModelsimSynplifyQuartusVivado
Certifications & Qualifications
U.S. CitizenshipAbility to Obtain Security Clearance
Industry Keywords
ASIC DesignFPGA DesignDesign for Test (DFT)Chip-Level Verification TechniquesFunctional Coverage
Tech Stack
Tools & technologiesPerlUnix
About the role
Key responsibilities & impact- Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration
- Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA design flow
- Contribute to engineering estimates for new program pursuits.
- Provide technical leadership for project design teams by breaking down work, planning activities, and reporting status
Requirements
What you’ll need- Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) unless prohibited by local laws/regulations and minimum 8 years prior relevant experience or an Advanced Degree in a related field and minimum 5 years of experience
- Demonstrated professional experience communicating in English (verbal and written).
- U.S. Citizenship and the ability to obtain a security clearance is required.
- RTL coding and simulation in VHDL or Verilog
- Digital circuit architecture, design, resource tradeoffs, timing analysis and timing closure
- Testbench development for the verification of RTL blocks using VHDL or System Verilog.
- Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g. Modelsim, Synplify, Quartus, Vivado, or other FPGA-specific tools)
- Experience with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog)
- Design for Test (DFT) and manufacturability issues
- Experience with Unix, scripting, C/C++, and/or Perl
Benefits
Comp & perks- Medical, dental, and vision insurance
- Three weeks of vacation for newly hired employees
- Generous 401(k) plan that includes employer matching funds
- Participation in the Employee Scholar Program (ESP)
- Life insurance and disability coverage
- Employee Assistance Plan, including up to 8 free counseling sessions.
- And more!
